DSA00164667.pdf by Cypress Semiconductor

Partial File Text CY2XP304 High-Frequency Programmable PECL Clock Generation Module Features · 40 ps typical peak-peak period jitter at 125 MHz · 30 ps typical output-output skew at 400 MHz · Four low-skew LVPECL
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
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