DSA00168791.pdf by Cypress Semiconductor

Partial File Text 36-Mbit QDR II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) 36-Mbit QDR® II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) CY7C1261KV18, CY7C1276KV18 CY7C1263KV18, CY7C1265KV
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3M Touch Systems CQ 1265