DSASW0060590.pdf by Silego Technology

Partial File Text SLGSSTVF16857 DDR 14-Bit Registered Buffer Features: · Differential Clock inputs · SSTL_2 data input signaling · Supports SSTL_2 class I output specifications · Output circuitry minimizes effe
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
Price & Stock
Powered by Findchips

DSASW0060590.pdf preview

Download Datasheet

User Tagged Keywords

48-TVSOP 48TVSOP PC3200 SILEGO SLGSSTVF16857 SLGSSTVF16857L