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DSA00434995.pdf
by Xilinx
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Application Note: FPGA, CPLD R XAPP150 (v1.1) May 15, 2001 I/V Curves for Xilinx FPGA and CPLD Families These typical curves describe the output sink and source current for average processi
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XAPP150
XC4000
XC4000E
XC4000XL
XC4000XLA
XC4000XV
XC9500
XC9500XL