DSA00435013.pdf by Xilinx

Partial File Text Application Note: Virtex Series, Virtex-II Series, and Spartan-II Family R PN Generators Using the SRL Macro Author: Andy Miller and Michael Gulotta XAPP211 (v1.2) June 14, 2004 Summary
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0711030 4 bit pn sequence generator c code 4 bit LFSR direct sequence spread spectrum virtex pn sequence generator pseudo random noise sequence generator notes and Puncturing vhdl qpsk modulation VHDL CODE QPSK using xilinx simple 32 bit LFSR using verilog simple 32 bit LFSR using vhdl SRL16 SRL16E verilog code 16 bit LFSR verilog code 32 bit LFSR verilog code 5 bit LFSR verilog code 8 bit LFSR verilog code for pseudo random sequence generator in vhdl code 10 bit LFSR vhdl code 12 bit LFSR vhdl code 16 bit LFSR vhdl code 8 bit LFSR vhdl code for 32 bit pn sequence generator vhdl code for 7 bit pseudo random sequence generator vhdl code for gold code vhdl code for pn sequence generator vhdl code for pn sequence generator using lfsr vhdl code for pseudo random sequence generator vhdl code for pseudo random sequence generator in vhdl code gold sequence code vhdl code PN code generator XAPP211 xapp211.zip XCV50

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