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    DSA0049520.pdf by Atmel

    • Feature Summary · · · · · · · · · · · · · · · 1.0 GFLOPS - 1.5 GOPS at 100 MHz AHB Master Port, integrated DMA Engine and AHB Slave Port VLIW Architecture with five Independent
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    0x3F80000000 IEEE754 ISA S20
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