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Partial File Text FAIRCHILD SUPER HIGH SPEED TTL/SSI â¢ 9S64/54S64, 74S64 4-2-3-2-INPUT AND-OR-INVERT GATE LOGIC AND CONNECTION DIAGRAM DIP (TOP VIEW) SCHEMATIC DIAGRAM LllUJUJLJLLlLÂ£JEJJ Positive logic: ABCD + EF +
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74S64