DSA00332112.pdf by National Semiconductor

Partial File Text 74F113 Dual JK Negative Edge-Triggered Flip-Flop General Description The 'F113 offers individual J K Set and Clock inputs When the clock goes HIGH the inputs are enabled and data may be entered T
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
Price & Stock
Powered by Findchips

DSA00332112.pdf preview

Download Datasheet

User Tagged Keywords

74F113 74F113PC 74F113SC 74F113SJ device code F113