74LVC3G34DP,125 datasheet by NXP Semiconductors

Description Triple buffer - Description: 3.3V Triple PicoGate Buffer ; Logic switching levels: TTL ; Number of pins: 8 ; Output drive capability: +/- 32 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 2.2@3.3V ns; Voltage: 1.65-5.5; Package: SOT505-2 (TSSOP8); Container: Reel Pack, Reverse, Reverse
Datasheet Type Original
RoHS Yes
Pb Free Unknown
Lifecycle Transferred
HTS Code 8542.39.00.01
Schedule B 8542.39.00.00
Price & Stock
Powered by Findchips

74LVC3G34DP,125 datasheet preview

The recommended operating voltage range for the 74LVC3G34DP is 1.65 V to 5.5 V.
Yes, the 74LVC3G34DP is compatible with both 3.3 V and 5 V systems, making it a versatile component for various applications.
The maximum propagation delay for the 74LVC3G34DP is approximately 3.5 ns at 3.3 V and 2.5 ns at 5 V.
Yes, the 74LVC3G34DP can be used in high-frequency applications up to 100 MHz, making it suitable for high-speed digital circuits.
Yes, the 74LVC3G34DP has built-in electrostatic discharge (ESD) protection, which helps prevent damage from static electricity.

74LVC3G34DP,125 datasheet preview Download Datasheet