74HCT4059D,112 datasheet
by NXP Semiconductors
- programmable divide-by-n counter - Description: Programmable Divide-By-N Counter; TTL Enabled ; F<sub>max</sub>: 40 MHz; Logic switching levels: TTL ; Number of pins: 24 ; Output drive capability: +/- 4 mA ; Power dissipation considerations: Low Power ; Propagation delay: 20 ns; Voltage: 4.5-5.5 V; Package: SOT137-1 (SO24); Container: Bulk Pack
- Original
- Yes
- Unknown
- Obsolete
-
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