74HCT109N,652 datasheet
by NXP Semiconductors
- Dual JK flip-flop with set and reset; positive-edge trigger - Description: Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger; TTL Enabled ; F<sub>max</sub>: 61 MHz; Logic switching levels: TTL ; Output drive capability: +/- 4 mA ; Power dissipation considerations: Low Power ; Propagation delay: 17 ns; Voltage: 4.5-5.5V; Package: SOT38-4 (DIP16); Container: Bulk Pack, CECC
- Original
- Yes
- Unknown
- Obsolete
-
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