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74ALVCH16601DGG:11
datasheet
by NXP Semiconductors
Description
18-bit universal bus transceiver (3-State) - Description: 2.5/3.3V 18-Bit Universal Bus Transceiver; Positive Edge Trigger Clock with Bus Hold (3-State) ; F<sub>max</sub>: 390 MHz; Logic switching levels: TTL ; Number of pins: 56 ; Output drive capability: +/- 24 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 2.8@3.3V ns; Voltage: 2.3-3.6; Package: SOT364-1 (TSSOP56); Container: Reel Pack, SMD, 13"
Datasheet Type
Original
RoHS
Yes
Pb Free
Unknown
Lifecycle
Obsolete
Price & Stock
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74ALVCH16601DGG:11
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