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Partial File Text FAIRCHILD HIGH SPEED TTL/SSI â¢ 9H00/54H00, 74H00 QUAD 2-INPUT NAND GATE LOGIC AND CONNECTION DIAGRAM DIP (TOP VIEW) snÅiÅimiÅiniEi f iÂ¿J iÂ¿J itei rÃ±* ljlululjluljlj Positive logie: Y = AB FLAT
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RoHS Unknown
Pb Free Unknown
Lifecycle Unknown

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74H00 TTL 74H00

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