DSA00337600.pdf by Xilinx

Partial File Text Application Note: Virtex Series and Spartan-II Family Synthesizable FPGA Interface for Retrieving ROM Number from 1-Wire Devices R XAPP198 (v1.0) May 8, 2001 Author: Dai Huang and Rick B
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"1 wire slave interface" verilog 1 wire verilog code DS1822 DS1WM DS2401 DS2430A slot machine verilog SRL16 verilog code for implementation of eeprom verilog code for johnson counter vhdl code CRC vhdl code for Clock divider for FPGA vhdl code for frequency divider XAPP198 xapp198.zip