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    DSA00102496.pdf by Xilinx

    • P1 TTL0 P1 D3 A1 TTL3 A2 TTL6 A3 TTL9 D2 A4 D1 D0 S1-118 S1-110 S1-103 S1-100 TTL1 P1 D4 B1 S1-122 S1-127 D6 TTL2 TTL5 B2 TTL7 B3
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