DSA00212296.pdf by Cypress Semiconductor

Partial File Text 372B CY7C1370B CY7C1372B PRELIMINARY 512Kx36/1Mx18 Pipelined SRAM with NoBLTM Architecture Features · Zero Bus Latency, no dead cycles between write and read cycles · Fast clock speed: 2
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
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CY7C1370B CY7C1370B-133AC CY7C1370B-200AC CY7C1372B

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