DSAE0067723.pdf by QuickLogic

Partial File Text QL3025 / QL3025R 25,000 Usable PLD Gate pASIC®3 FPGA Combining High Performance and High Density PRELIMINARY DATA February, 1998 2 ... 25,000 usable PLD gates, 204 I/O pins 16,128 bit
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
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PQ208 QL3025 QL3025-1PB256C QL3025-1PF144C QL3025-1PQ208C