DSA00923501.pdf by Xilinx

Partial File Text 0 R XC95144 In-System Programmable CPLD 0 5 DS067 (v5.4) April 15, 2005 Product Specification Features · · · · · 7.5 ns pin-to-pin logic delays on all pins fCNT to 111 MHz 144 macroce
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