DSA2IH00168257.pdf by Not Available

Partial File Text KM62256CLE-LU Preliminary CMOS SRAM GENERAL DESCRIPTION The KM62256CLE-LU is a 262,144-bit high-speed Static Random Access Memory organized as 32,768 words by 8 bits. The device is fabricated usi
Datasheet Type Scan
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown

DSA2IH00168257.pdf preview Download Datasheet