This site uses third-party website tracking technologies to provide and continually improve our services, and to display advertisements according to users' interests. I agree and may revoke or change my consent at any time with effect for the future.
CTS100LVEL33
LVPECL Divide by 4 Divider
MLP8, MSOP8, SOIC8
Features
Block Diagram
5.0+ GHz Toggle Frequency
470ps Propagation Delay
Internal Input Pull-down Resistors
3.0V to 5.5V Power Su