DSAIH00090506.pdf by Cypress Semiconductor
- CY7C2642KV18/CY7C2644KV18 ® 144-Mbit QDR II+ SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency) with ODT 144-Mbit QDR ® II+ SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) with
- Original
- Unknown
- Unknown
- Unknown
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