DSA00131885.pdf by Cypress Semiconductor

Partial File Text 380B CY7C1380B CY7C1382B PRELIMINARY 512K x 36 / 1M x 18 Pipelined SRAM Features inputs, address-pipelining Chip Enable (CE), burst control inputs (ADSC, ADSP, and ADV), write enables (B
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CY7C1380B CY7C1382 CY7C1382B