DSAUD0043703.pdf by Cypress Semiconductor

Partial File Text CY7C2166KV18, CY7C2177KV18 CY7C2168KV18, CY7C2170KV18 18-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Features Configurations 18 Mbit density (2 M x
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
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