DSA00109434.pdf by Silicon Laboratories

Partial File Text C8051F120/1/2/3/4/5/6/7 C8051F130/1/2/3 Mixed Signal ISP Flash MCU Family High Speed 8051 µC Core - Pipelined Instruction Architecture; Executes 70% of Analog Peripherals - 10 or 12-bit SAR AD
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