DSA0067321.pdf by Hitachi Semiconductor

Partial File Text HN29V25611AT-50H Block Diagram Sector address buffer X-decoder 16384 × (2048 + 64) × 8 memory matrix Data register (2048 + 64) ·· I/O0 to I/O7 · · Multiplexer 16057 - 1
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buffer HN29V25611AT-50H matrix multiplexer multiplexer