DSASL004909.pdf by Xilinx

Partial File Text 0 R DS017 (v1.1) August 30, 2000 XCR3064XL 64 Macrocell CPLD 0 14 Preliminary Product Specification Features Description · 6.0 ns pin-to-pin logic delays · System fre
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cpld table DS012 TQ100 VQ100 XCR3064XL

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