DSA0098376.pdf by Integrated Device Technology

Partial File Text T1/E1/OC3 WAN PLL WITH DUAL REFERENCE INPUTS FEATURES ADVANCE INFORMATION IDT82V3012 · Provides a C2/C1.5 output clock signal with the frequency controlled by the selected reference input Fr
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F7C-2E3-20 GR-1244-CORE IDT82V3012 TR62411