DSASL0037315.pdf by Silicon Laboratories

Partial File Text C8051F060/1/2/3/4/5/6/7 Mixed Signal ISP Flash MCU Family High Speed 8051 C Core - Pipelined instruction architecture; executes 70% of Analog Peripherals - Two 16-Bit SAR ADCs · 16-bit resolut
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
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