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DSA00123464.pdf
by Fairchild Semiconductor
Partial File Text
DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs sition time of the negative going edge of the clock pulse. Data on the J and K inpu
Datasheet Type
Original
RoHS
Unknown
Pb Free
Unknown
Lifecycle
Obsolete
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Equivalent Parts
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Always verify details of parts you are evaluating, as these parts are offered as suggestions for what you are looking for and are not guaranteed.
SN74S112AN
N74S112B
SN74S112ANE4
N74S112B
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