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    • 03 CO NNECTIO N DIAGRAM PINOUT A + 5 4 /7 4 0 3 < '■+ ‘ 5 4 S /7 4 S 0 3 ^ 5 4 L S /7 4 L S 0 3 " 7 ? s QUAD 2-INPUT NAND GATE (W ith O p e n - C o lle c t o r O u tp u t) ORDERING COD
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