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    DASF00150.pdf by Cypress Semiconductor

    • CY7C1266V18, CY7C1277V18 CY7C1268V18, CY7C1270V18 36-Mbit DDR-II+ SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) Features Functional Description 36-Mbit density (4M x 8, 4M x
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