This site uses third-party website tracking technologies to provide and continually improve our services, and to display advertisements according to users' interests. I agree and may revoke or change my consent at any time with effect for the future.
36 Mb (1M x 36 & 2M x 18)
DDR-II (Burst of 2) CIO Synchronous SRAMs
.
I
May 2009
Features
· 1M x 36 or 2M x 18.
· On-chip delay-locked loop (DLL) for wide data
valid window.
· Common data