DSAUD0072777.pdf by National Semiconductor

Partial File Text General Description Features The LP2995 linear regulator is designed to meet the JEDEC SSTL-2 and SSTL-3 specifications for termination of DDRSDRAM. The device contains a high-speed operational
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
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LP2995 LP2995LQ LP2995LQX LP2995M LP2995MR LP2995MRX LP2995MX

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