DSAASSA000715.pdf by Arizona Microtek

Partial File Text AZ100LVEL32 PECL/ECL ÷2 Divider DESCRIPTION The AZ100LVEL32 is an integrated ÷2 divider. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flop will
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
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AZ100LVEL32 ECL divider marking C2G

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