LT10K
Abstract: 2500-00J 2500-02J 2500-04J 2500-06J
Text: ROVE PA RT Molded Unshielded RF Coils D DA SH IN # DU µ CT H A ± NC 5% E Q MI NI MU M TE ST FR EQ UE NC SR Y F (M MI Hz NI ) M DC UM R ( MH MA ES z) XI IST M A CU UM N C R MA RE (OH E XI NT MS M MO UM RAT ) LD (m ING SI A) ZE PP MI L A Series 2500 L I TA R Y
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MS90539
LT10K)
LT10K
2500-00J
2500-02J
2500-04J
2500-06J
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4948a
Abstract: MS90541
Text: ROVE PA RT Molded Unshielded RF Coils D DA SH IN # DU µ CT H A ± 5 NC % E Q MI NI MU M TE ST FR EQ UE NC SR Y F (M MI Hz NI ) M DC UM R ( MH MA ES z) XI IST M A CU UM N C R MA RE (OH E XI NT MS M MO UM RAT ) LD (m ING SI A) ZE PP MI L A Series 2500 L I TA R Y
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PDF
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MS90539
LT10K)
2500-00J
2500-02J
2500-04J
2500-06J
2500-08J
2500-10J
2500-12J
2500-14J
4948a
MS90541
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Untitled
Abstract: No abstract text available
Text: ROVE PA RT Molded Unshielded RF Coils D DA SH IN # DU µ CT H A ± 5 NC % E Q MI NI MU M TE ST FR EQ UE NC SR Y F (M MI Hz NI ) M DC UM R ( MH MA ES z) XI IST M A CU UM N C R MA RE (OH E XI NT MS M MO UM RAT ) LD (m ING SI A) ZE PP MI L A Series 2500 L I TA R Y
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Original
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PDF
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MS90539
LT10K)
2500-00J
2500-02J
2500-04J
2500-06J
2500-08J
2500-10J
2500-12J
2500-14J
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LT10K
Abstract: MS-90539 MS90541
Text: 2500R 2500 A MI NU MB ER MI * L DA SH IN # DU µ CT H A ± NC 5% E Q MI NI MU M TE ST FR EQ UE NC SR Y F (M MI Hz NI ) M DC UM R ( MH MA ES z) XI IST M A CU UM N C R MA RE (OH E XI NT MS M MO UM RAT ) LD (m ING SI A) ZE Series L I TA R Y PP ROVE D DA SH
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2500R
MS90539
LT10K)
LT10K
MS-90539
MS90541
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Untitled
Abstract: No abstract text available
Text: 2500R 2500 A MI NU MB ER MI * L DA SH IN # DU µ CT H A ± NC 5% E Q MI NI MU M TE ST FR EQ UE NC SR Y F (M MI Hz NI ) M DC UM R ( MH MA ES z) XI IST M A CU UM N C R MA RE (OH E XI NT MS M MO UM RAT ) LD (m ING SI A) ZE Series L I TA R Y PP ROVE D DA SH
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2500R
MS90539
LT10K)
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SDS Relais
Abstract: sds relais 5v sds relais S2- 5V SDS RELAIS S2 INT5500 telefunken Telefunken u 237 M44C510 dil relay hamlin M44C588
Text: MARC4 4-Bit Microcontroller User’s Guide 1996 I. Introduction II. Installation Guide III. Software Development System IV. qFORTH Compiler V. Software Simulator VI. Emulator VII. Target Application Boards VIII. Piggybacks IX. OTP Programmer X. Appendix XI. Addresses
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20COM0.
M44C636
SDS Relais
sds relais 5v
sds relais S2- 5V
SDS RELAIS S2
INT5500
telefunken
Telefunken u 237
M44C510
dil relay hamlin
M44C588
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DS2009
Abstract: DS2011 DS2013 100 watt hf transistor 12 volt DS2010 DS2009-50 DS2009-65 DS2009-80 DS2012 DS2009-120
Text: DS2009 DS2009 512 x 9 FIFO Chip • Flexible 512 x 9 organization • Low-power HCMOS technology • Asynchronous and simultaneous read/write • Bidirectional applications PIN ASSIGNMENT W 1 28 D8 D3 2 3 27 VCC D4 26 D5 D2 4 D1 D0 XI FF 5 6 7 25 24 23 D6
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DS2009
28-Pin
30tput
DS2010,
DS2011,
DS2012,
DS2013
120ns
DS2009
DS2011
100 watt hf transistor 12 volt
DS2010
DS2009-50
DS2009-65
DS2009-80
DS2012
DS2009-120
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DS2011
Abstract: DS2009
Text: DS2011 DS2011 2048 x 9 FIFO Chip • Flexible 2048 x 9 organization • Low-power HCMOS technology • Asychronous and simultaneous read/write • Bidirectional applications PIN ASSIGNMENT W 1 28 D8 D3 2 3 27 VCC D4 26 D5 D2 4 D1 D0 XI FF 5 6 7 25 24 23 D6
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DS2011
28-Pin
DS2011
DS2009
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DS2010
Abstract: Q4 D8 DS2009
Text: DS2010 DS2010 1024 x 9 FIFO Chip PIN ASSIGNMENT W 1 28 D8 D3 2 3 27 VCC D4 26 D5 D2 4 5 6 7 D6 D7 • Bidirectional applications D1 D0 XI FF 25 24 23 • Fully expandable by word width or depth Q0 Q1 • Empty and full warning flags Q2 Q3 Q8 • Flexible 1024 x 9 organization
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DS2010
DS2010
DS2009
DS2009
Q4 D8
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DS2009
Abstract: DS2012
Text: DS2012 DS2012 4096 x 9 FIFO Chip PIN ASSIGNMENT W 1 28 D8 D3 2 3 27 VCC D4 26 D5 D2 4 5 6 7 D6 D7 • Bidirectional applications D1 D0 XI FF 25 24 23 • Fully expandable by word width or depth Q0 Q1 • Empty and full warning flags Q2 Q3 Q8 • Flexible 4096 x 9 organization
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DS2012
28-Pin
DS2012
DS2009
DS2009
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DS2013
Abstract: DS2009
Text: DS2013 DS2013 8192 x 9 FIFO Chip FEATURES PIN ASSIGNMENT • First-in, first-out memory-based architecture W 1 28 D8 D3 2 3 27 VCC D4 26 D5 D2 4 • Asychronous and simultaneous read/write D1 D0 D6 D7 • Bidirectional applications XI FF 5 6 7 25 24 23 • Fully expandable by word width or depth
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DS2013
28-Pin
DS2013
DS2009
DS2009
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H-8012
Abstract: No abstract text available
Text: M iniature Quadrature Hybrid Couplers XI controlled material tolerances, ensures extra ordinary reproducibility of electrical param e ters as well as excellent phase and amplitude tracking. All units are packaged in lightweight solid aluminum cases with convenient mount
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153QH-2040H-3060H-4080H-5965H-7011H-8012-
H-0510
H-1530
H-2040
H-3000
H-7011
H-8012
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Untitled
Abstract: No abstract text available
Text: DS2011 DALLAS DS2011 2048 x 9 FIFO Chip SEMICONDUCTOR FEATURES PIN ASSIGNMENT • First-in, first-out memory-based architecture w c 1* ds C • Flexible 2048 x 9 organization D3C D2C D id DOC XI C FFC • Low-power HCM OS technology • Asychronous and simultaneous read/write
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PDF
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DS2011
10ransmit
DS2009
2bmi30
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DS2011
Abstract: DS2009
Text: DS2011 DALLAS DS2011 2048 x 9 FIFO Chip SEMICONDUCTOR FEATURES PIN ASSIGNMENT • First-in, first-out memory-based architecture w c 1* ds C • Flexible 2048 x 9 organization D3C D2C D id DOC XI C FFC • Low-power HCM OS technology • Asychronous and simultaneous read/write
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OCR Scan
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PDF
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DS2011
DS2011
DS2009
2bmi30
|
|
Untitled
Abstract: No abstract text available
Text: DALLAS SEMICONDUCTOR DS2011 2048 x 9 FIFO Chip PIN ASSIGNMENT w c 1« D ec 2 D3C 3 D2Ü 4 • Flexible 2048 x 9 organization • Low-power HCMOS technology D1C 5 DOC 6 xi C 7 • Asychronous and simultaneous read/write FF C B • Bidirectional applications
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OCR Scan
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PDF
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DS2011
DS2011
DS2009
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Untitled
Abstract: No abstract text available
Text: DS2012 DALLAS SEMICONDUCTOR DS2012 4096 x 9 FIFO Chip PIN ASSIGNMENT • First-in, first-out memory-based architecture W C 1* D8Ü 2 D3C 3 D2Ü 4 • Flexible 4096 x 9 organization • Low-power HCMOS technology D1C DOC XI C FFC • Asychronous and simultaneous read/write
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OCR Scan
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PDF
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DS2012
DS2012
DS2009
DS2009
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Untitled
Abstract: No abstract text available
Text: DS2010 DALLAS SEMICONDUCTOR DS2010 1 0 2 4 x 9 FIFO Chip PIN ASSIGNMENT FEATURES • First-in, first-out m em ory-based architecture WC D8C D3C D2C D ill DOE XI C FF C • Flexible 1024 x 9 organization • Low-power HCM O S technology • Asychronous and sim ultaneous read/write
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OCR Scan
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PDF
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DS2010
120ns
DS2010
DS2009
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sfns101
Abstract: No abstract text available
Text: SOL ITR ON DEVICE S INC 70 ¿ F | fl3bBbOE 0 0 0 1 ^ 5 3 7"* 3 r - 2 ^ SWITCH MOS SFNS101A POWER MOS PACKAG E TO-52 MA XI MU M RATINGS VDS rD IDM VGS PD IL ^J oper T . stg UNITS PARAMETER SYMBOL Voltage, Drain to Source 100 Drain Current, Continuous @ Tc*25°C
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SFNS101A
5M6-24UNF-2A
P06fTKM
eA03AT
sfns101
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rc4565
Abstract: A1536 DS2009 DS2009-35 DS2009-50 DS2009-65 DS2009-80 DS2013 141S1
Text: V y * DALLAS SEMICONDUCTOR 512 DS2009 9 FIFO Chip PIN ASSIGNMENT FEATURES • First-in, first-out memory-based architecture W £ 1# D8ÍZ 2 D3C 3 D2C 4 D1C 5 DOH 6 XI c 7 FF C 8 • Flexible 512 x 9 organization • Low-power HCMOS technology • Asynchronous and simultaneous read/write
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OCR Scan
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PDF
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DS2009
512x9
DS2010,
DS2011,
DS2012,
DS2013
120ns
DS2010
rc4565
A1536
DS2009-35
DS2009-50
DS2009-65
DS2009-80
141S1
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DS2011
Abstract: DS2009 DS2009-120 DS2009-35 DS2009-50 DS2009-65 DS2009-80 DS2010
Text: DALLAS SEMICONDUCTOR DS2009 5 1 2 x 9 F IF O C h ip PIN ASSIGNMENT FEATURES • First-in, first-out memory-based architecture W C 1# D 8d 2 D3C 3 D2Ü 4 • Flexible 5 1 2 x9 organization • Low-power HCMOS technology D id DOC XI 0 FF C • Asynchronous and simultaneous read/write
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OCR Scan
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PDF
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DS2009
512x9
2bl413D
DS2010,
DS2011,
DS2012,
DS2013
120ns
DS2011
DS2009
DS2009-120
DS2009-35
DS2009-50
DS2009-65
DS2009-80
DS2010
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X3100
Abstract: No abstract text available
Text: A p p l i c a t io n N o t e A V A I L A B L E \ 3 or 4 Cell Li-Ion BATTERY PACKS P relim in ary Inform ation XI €01 X3100 3 or 4 Cell Li-Ion Battery Protection and Monitor IC FEATURE BENEFIT • Software selectable safety levels and variable protect detection/release times
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OCR Scan
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PDF
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X3100
X3100
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14285Q
Abstract: 14285S
Text: D S14285/D S14287 DALLAS SEMICONDUCTOR DS1 4285/DS1 4287 Real Time Clock with NV RAM Control PIN ASSIGNMENT FEATURES V cco C , 24 □ XI C 2 23 □ sow X2 C 3 22 □ CEO ADO I I 4 21 □ ceT AD1 C 5 20 □ V BAT AD2 C 8 19 □ IRQ AD3 C 1 18 □ RE S ET AD4 C
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S14285/D
S14287
4285/DS1
DS1285/DS1287
DS14285,
DS14285S,
DS14285Q)
DS14287)
DS14287
14285Q
14285S
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Untitled
Abstract: No abstract text available
Text: D S 17285/D S17287 P R E L IM IN A R Y DALLAS SEMICONDUCTOR D S 1 7 2 8 5 /D S 1 7 2 8 7 3 Volt/5 Volt Real Time Clock PIN ASSIGNMENT FEATURES Incorporates industry standard DS1287 PC clock plus enhanced features: C 1 xi L 2 X2 C 3 ADO C 4 ^ adì n 5 20 AD2 C
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PDF
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17285/D
S17287
DS1287
64-bit
D010bb3
DS17285/D
DS17287
24-PIN
001Gbb4
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9660t
Abstract: LH521008
Text: SHARP b OE CORP D • Ô1ÔD7TÔ DDDTME? 302 «SRPJ 'T - H C - 2 3 - / O LH101504 LH101510 . R E L I M I N A Ü 3 H 1 3 C5 WF A,s Au Ai 3 R Y High-Speed BiCMOS 1M 1M xi ECL Static RAM ■ Description ■ The LH101504/LH101510 is a 256K/1M-bit high speed
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OCR Scan
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PDF
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LH101504
LH101510
LH101504/LH101510
256K/1M-bit
742S6
9660t
LH521008
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