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Catalog Datasheet	MFG & Type	PDF	Document Tags
XC6SLX9-TQG144-2C Abstract: XC6SLX45-CSG324 XC6SLX16-CSG225 XC6SLX16-FTG256 XC6SLX16-CSG324 XC6SLX4-TQG144-2C XC6SLX45-CSG484 XC6SLX9-CSG225 XC3S1400A-FG676-4C/I XC6SLX45-FGG484 Text: 32-Bit Initiator/Target v3 & v4 for PCI DS206 December 2, 2009 Product Specification v3.167 & v4.11 Features • Fully compliant 32-bit, 66/33 MHz Initiator/Target core for PCI • Customizable, programmable, single-chip solution • Pre-defined implementation for predictable timing	Original	PDF	32-Bit DS206 32-bit, XC6SLX9-TQG144-2C XC6SLX45-CSG324 XC6SLX16-CSG225 XC6SLX16-FTG256 XC6SLX16-CSG324 XC6SLX4-TQG144-2C XC6SLX45-CSG484 XC6SLX9-CSG225 XC3S1400A-FG676-4C/I XC6SLX45-FGG484
XC6SLX45-CSG324 Abstract: XC6SLX16-CSG324 XC6SLX45-CSG484 XC3SD3400AFG676 XC6SLX9-FTG256 XC6SLX45t-fgg484 XC6SLX16-CSG324-2C XC6SLX16-FTG256 XC6SLX45-FGG484 xc3s1400afg676 Text: 64-Bit Initiator/Target v3 & v4 for PCI DS205 December 2, 2009 Product Specification v3.167 & v4.10 Features Core Facts • Fully compliant 64-bit, 66/33 MHz LogiCORE IP Initiator/Target core for PCI Resource Utilization 1 v4 Core v3 Core • Customizable, programmable, single-chip solution	Original	PDF	64-Bit DS205 64-bit, XC6SLX45-CSG324 XC6SLX16-CSG324 XC6SLX45-CSG484 XC3SD3400AFG676 XC6SLX9-FTG256 XC6SLX45t-fgg484 XC6SLX16-CSG324-2C XC6SLX16-FTG256 XC6SLX45-FGG484 xc3s1400afg676
XC7K325TFFG900 Abstract: XC6SLX45-CSG324 XC3SD3400AFG676 XC7K325T-ffg900 spartan ucf file 6 XC6SLX16-FTG256 XC6SLX25-CSG324-2C XC6SLX16-CSG324 XC6SLX45-FGG484 XC7K355T-FFG901 Text: LogiCORE IP 32-Bit Initiator/Target v3 & v4 for PCI DS206 October 19, 2011 Product Specification v3.167 & v4.15 Features LogiCORE IP Facts Table • Fully compatible 32-bit, 66/33 MHz Initiator/Target core for PCI • Customizable, programmable, single-chip solution	Original	PDF	32-Bit DS206 32-bit, XC7K325TFFG900 XC6SLX45-CSG324 XC3SD3400AFG676 XC7K325T-ffg900 spartan ucf file 6 XC6SLX16-FTG256 XC6SLX25-CSG324-2C XC6SLX16-CSG324 XC6SLX45-FGG484 XC7K355T-FFG901
XC6SLX45-FGG484 Abstract: xilinx logicore core dds DSP48A1s xilinx logicore core dds square wave DS558 DSP48 precision Sine 1Mhz Wave Generator vhdl for 8 point fft in xilinx sine cosine phase quadrant look-up address f xc3*6 Text: LogiCORE IP DDS Compiler v4.0 DS558 December 2, 2009 Product Specification Introduction The LogiCORE IP DDS Direct Digital Synthesizer Compiler core sources sinusoidal waveforms for use in many applications. A DDS consists of a Phase Generator and a SIN/COS Lookup Table. These parts are available	Original	PDF	DS558 XC6SLX45-FGG484 xilinx logicore core dds DSP48A1s xilinx logicore core dds square wave DSP48 precision Sine 1Mhz Wave Generator vhdl for 8 point fft in xilinx sine cosine phase quadrant look-up address f xc3*6
XC7Z020CLG400 Abstract: XC7Z020CLG484 XC7K160Tffg676 XC7Z045FFG900 XC7A200T-FBG484 XC7Z010-CLG400 Text: LogiCORE IP 64-Bit Initiator/Target v3 & v4 for PCI DS205 October 16, 2012 Product Specification v3.167 & v4.18 Features LogiCORE IP Facts • Fully compatible 64-bit, 66/33 MHz LogiCORE IP Initiator/Target core for PCI™ • Customizable, programmable, single-chip solution	Original	PDF	64-Bit DS205 64-bit, XC7Z020CLG400 XC7Z020CLG484 XC7K160Tffg676 XC7Z045FFG900 XC7A200T-FBG484 XC7Z010-CLG400
xc7a100tcsg324 Abstract: XC7A200T-FBG484 XC6SLX16CSG324 Xilinx ISE Design Suite 14.2 XC6SLX45-FGG484 XC6SLX100-FGG676 XC6SLX16-CSG324 XC6SLX45-CSG324 XC6SLX9CSG324 XC6SLX45-CSG484 Text: LogiCORE IP 64-Bit Initiator/Target v3 & v4 for PCI DS205 July 25, 2012 Product Specification v3.167 & v4.17 Features LogiCORE IP Facts • Fully compatible 64-bit, 66/33 MHz LogiCORE IP Initiator/Target core for PCI™ • Customizable, programmable, single-chip solution	Original	PDF	64-Bit DS205 64-bit, xc7a100tcsg324 XC7A200T-FBG484 XC6SLX16CSG324 Xilinx ISE Design Suite 14.2 XC6SLX45-FGG484 XC6SLX100-FGG676 XC6SLX16-CSG324 XC6SLX45-CSG324 XC6SLX9CSG324 XC6SLX45-CSG484
XC7K160Tffg676 Abstract: XC7K160T-FBG676 XC7K325TFFG900 XC7K325T-FFG676 XC6SLX45-FGG484 XC6SLX16CSG324 XC6SLX45-CSG484 XC7K410TFFG900 XC7V585T-FFG1761 XC6SLX45-CSG324 Text: LogiCORE IP 64-Bit Initiator/Target v3 & v4 for PCI DS205 October 19, 2011 Product Specification v3.167 & v4.15 Features LogiCORE IP Facts • Fully compliant 64-bit, 66/33 MHz LogiCORE IP Initiator/Target core for PCI™ • Customizable, programmable, single-chip solution	Original	PDF	64-Bit DS205 64-bit, XC7K160Tffg676 XC7K160T-FBG676 XC7K325TFFG900 XC7K325T-FFG676 XC6SLX45-FGG484 XC6SLX16CSG324 XC6SLX45-CSG484 XC7K410TFFG900 XC7V585T-FFG1761 XC6SLX45-CSG324
XC6SLX45-FGG484 Abstract: xc6slx45fgg484 SPARTAN 6 xc6slx45 spartan-6 XC6SLX45 DSP48Es XC6SLX45-FGG484-2 EP 2000 5754 datasheet DS558 DSP48 Text: DDS Compiler v3.0 DS558 June 24, 2009 Product Specification Features Applications • • Digital radios and modems • Software-defined radios SDR • Digital down/up converters for cellular and PCS base stations • Waveform synthesis in digital phase locked loops	Original	PDF	DS558 DSP48 XC6SLX45-FGG484 xc6slx45fgg484 SPARTAN 6 xc6slx45 spartan-6 XC6SLX45 DSP48Es XC6SLX45-FGG484-2 EP 2000 5754 datasheet DSP48
qpsk AND 8PSK modulation VHDL CODE Abstract: XILINX vhdl code LDPC 16APSK LDPC encoder verilog vhdl code FOR 8PSK qpsk modulation VHDL CODE vhdl code for ldpc LDPC Decoder vhdl XC6SLX45-FGG484 dvb-s encoder design with fpga Text: LogiCORE IP DVB-S.2 FEC Encoder v2.0 DS505 December 2, 2009 Product Specification Introduction Overview The Xilinx DVB-S.2 FEC Encoder core provides designers with a Forward Error Correction FEC Encoding block for DVB-S.2 systems. The DVB-S.2 FEC Encoder core provides a complete	Original	PDF	DS505 qpsk AND 8PSK modulation VHDL CODE XILINX vhdl code LDPC 16APSK LDPC encoder verilog vhdl code FOR 8PSK qpsk modulation VHDL CODE vhdl code for ldpc LDPC Decoder vhdl XC6SLX45-FGG484 dvb-s encoder design with fpga
xc7a100tcsg324 Abstract: XC7K160Tffg676 XC7K325TFFG676 XC7A200T-FBG484 XC7K325T-FFG676 xc6slx25tcsg324 XC6SLX4-TQG144-2C XC7K480TFFG901 XC7K325T-FBG900-1C/I XC7Z020CLG400 Text: LogiCORE IP 32-Bit Initiator/Target v3 & v4 for PCI DS206 October 16, 2012 Product Specification v3.167 & v4.18 Features LogiCORE IP Facts Table • Fully compatible 32-bit, 66/33 MHz Initiator/Target core for PCI • Customizable, programmable, single-chip solution	Original	PDF	32-Bit DS206 32-bit, xc7a100tcsg324 XC7K160Tffg676 XC7K325TFFG676 XC7A200T-FBG484 XC7K325T-FFG676 xc6slx25tcsg324 XC6SLX4-TQG144-2C XC7K480TFFG901 XC7K325T-FBG900-1C/I XC7Z020CLG400
XC6SLX9-TQG144-2C Abstract: XC6SLX45-CSG324 XC6SLX45-CSG484 XC6SLX9-FTG256 XC6SLX45CSG324 XC6SLX16-CSG324 XC6SLX100-FGG676 XC6SLX45-FGG484 XC6SLX9CSG324 XC6SLX9-CSG225 Text: LogiCORE IP 32-Bit Initiator/Target v3 & v4 for PCI DS206 September 10, 2010 Product Specification v3.167 & v4.13 Features LogiCORE IP Facts • Fully compliant 32-bit, 66/33 MHz Initiator/Target core for PCI • Customizable, programmable, single-chip solution	Original	PDF	32-Bit DS206 32-bit, 32-Bit XC6SLX9-TQG144-2C XC6SLX45-CSG324 XC6SLX45-CSG484 XC6SLX9-FTG256 XC6SLX45CSG324 XC6SLX16-CSG324 XC6SLX100-FGG676 XC6SLX45-FGG484 XC6SLX9CSG324 XC6SLX9-CSG225
xc7a100tcsg324 Abstract: Spartan-6 XC6SLX45-CSG324 XC3SD1800A-FG676 SPARTAN DSP XC7A200T-FBG484 XC6SLX9CSG225 XC6SLX4-TQG144-2C XC6SLX9-CSG225 Xilinx ISE Design Suite 14.2 XC7A50T XC6SLX16-CSG225 Text: LogiCORE IP 32-Bit Initiator/Target v3 & v4 for PCI DS206 July 25, 2012 Product Specification v3.167 & v4.17 Features LogiCORE IP Facts Table • Fully compatible 32-bit, 66/33 MHz Initiator/Target core for PCI • Customizable, programmable, single-chip solution	Original	PDF	32-Bit DS206 32-bit, xc7a100tcsg324 Spartan-6 XC6SLX45-CSG324 XC3SD1800A-FG676 SPARTAN DSP XC7A200T-FBG484 XC6SLX9CSG225 XC6SLX4-TQG144-2C XC6SLX9-CSG225 Xilinx ISE Design Suite 14.2 XC7A50T XC6SLX16-CSG225