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AMD XC17S30XLVO8I IC 3V PROM SER 300K 8-SOIC
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XC17S30XL VO8 I Datasheets (2)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
XC17S30XLVO8I		Xilinx	Spartan 3.3V one-time programmable configuration PROM. Configuration bits 249168.		Original	PDF
XC17S30XLVO8I		Xilinx	SERIAL PROM FOR 30000 SYSTEM GATE LOGIC		Original	PDF

XC17S30XL VO8 I Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
656 fpga Abstract: XC17XX xc17500 XCS05XL Configuration PROMs XC18V00 XC1700 XC1701L XC1702L XC17128EL Text: Reference XC18V00, XC1700, XC17500 FPGA Our PROM product lines are designed to meet the same stringent demands as our high performance FPGAs and CPLDs, taking full advantage of our advanced processing technologies. They were developed in close cooperation	Original	XC18V00, XC1700, XC17500 XC18V00 XC1700 XC17S00 XC17xx XC18Vxx XC17xx/XC18Vxx XCV50 656 fpga XCS05XL Configuration PROMs XC1701L XC1702L XC17128EL	PDF
TsoP 20 Package XILINX Abstract: xl marking 17s10l xc17s30xlvo8c XC17S20PD8C SPARTAN XC2S50 xilinx 8 pin dip XCS05 XCS05XL XCS10XL Text: X-Ref Target - Figure 0 R Spartan/XL Family One-Time Programmable Configuration PROMs XC17S00/XL DS030 (v1.12) June 20, 2008 Product Specification Features • Configuration one-time programmable (OTP) read-only memory designed to store configuration bitstreams for	Original	XC17S00/XL) DS030 20-pin TsoP 20 Package XILINX xl marking 17s10l xc17s30xlvo8c XC17S20PD8C SPARTAN XC2S50 xilinx 8 pin dip XCS05 XCS05XL XCS10XL	PDF
xc17s40l Abstract: XC17S10L XC17S30L XC17S05L marking v14 SPARTAN XC2S50 XC17S100XLPD8C DS030 XC17S40 XCS05 Text: R DS030 v1.4 February 18, 2000 Spartan Family of PROMs 5* Product Specification Introduction Spartan PROM Features The Spartan family of PROMs provide an easy-to-use, cost-effective method for storing Spartan device configuration bitstreams. • When the Spartan device is in Master Serial mode, it generates a configuration clock that drives the Spartan PROM.	Original	DS030 20-pin xc17s40l XC17S10L XC17S30L XC17S05L marking v14 SPARTAN XC2S50 XC17S100XLPD8C DS030 XC17S40 XCS05	PDF
XC17S30L Abstract: XC17S40PD8I xc17s40l XCS10XL XCS20 XCS20XL XCS30 XCS30XL XC17S05XLVO8C XCS40XL Text: Spartan and SpartanXL Families of Serial Configuration PROMs R September 8, 1998 Version 1.2 8* Product Specification Introduction Spartan SPROM Features The Spartan family of Serial Configuration PROMs (SPROM) provides and easy-to-use, cost-effective method	Original	C17S10 XC17S10L XC17S20 XC17S20L XC17S30 XC17S30L XC17S40 XC17S40L 20-Pin XC17S30L XC17S40PD8I xc17s40l XCS10XL XCS20 XCS20XL XCS30 XCS30XL XC17S05XLVO8C XCS40XL	PDF
17S40 Abstract: 17S10L XC17S30 17s30 17S40L SPARTAN XC2S50 XC17S30XLVOG8I XC17S40 17s30l XCS05 Text: Spartan/XL Family One-Time Programmable Configuration PROMs XC17S00/XL R DS030 (v1.11) July 9, 2007 Product Specification 5 Features • Configuration one-time programmable (OTP) read-only memory designed to store configuration bitstreams for Spartan , and Spartan-XL FPGAs	Original	XC17S00/XL) DS030 20-pin UG112, XC17S40 XC17S05XL, XC17S10XL, XC17S20XL, XC17S30XL, XC17S40XL, 17S40 17S10L XC17S30 17s30 17S40L SPARTAN XC2S50 XC17S30XLVOG8I 17s30l XCS05	PDF
sprom 8 pins dip Abstract: Xc 4000 FPGA family XC17S40 XCS05 XCS05XL XCS10 XCS10XL XCS20 XCS20XL XCS30 Text: Spartan and Spartan-XL Families of Serial Configuration PROMs  March 3, 1998 Version 1.0 0* Advance Product Specification Introduction Spartan SPROM Features The Spartan family of Serial Configuration PROMs (SPROM) provides and easy-to-use, cost-effective method	Original	30XLVO8I XC17S40XLSO20I 17S20L XC17S05 XC17S05L XC17S10 XC17S10L XC17S20 XC17S20L XC17S30 sprom 8 pins dip Xc 4000 FPGA family XC17S40 XCS05 XCS05XL XCS10 XCS10XL XCS20 XCS20XL XCS30	PDF
17S10L Abstract: 17s30 17S10 17S05 17s30l 17S10 PC 17S40 17s20lvc 17S40L 17S20 Text: Spartan Family of One-Time Programmable Configuration PROMs XC17S00 R DS030 (v1.8) October 10, 2001 5 Introduction Product Specification Spartan PROM Features Spartan The family of PROMs provides an easy-to-use, cost-effective method for storing Spartan device configuration bitstreams.	Original	XC17S00) DS030 XC17S200XL XC2S200. 17S10L 17s30 17S10 17S05 17s30l 17S10 PC 17S40 17s20lvc 17S40L 17S20	PDF
xilinx pq-160 Abstract: xcs20 316 SO8 XC95 XC95144XL XC95144XL prom XC1700 XC4000XV XC40110XV XC40150XV Text: Device Selection Guide 384 600 864 1,176 1,536 2,400 3,456 4,704 6,144 1,536 2,400 3,456 4,704 6,144 9,600 13,824 18,816 24,576 180 196 260 284 324 404 500 510 510 see note 2 Total CLBs Total CLBs Total Flip-Flops Max. I/O Package 196 400 576 1,024 1,024	Original		PDF
XC95288XL prom Abstract: X9536XL XC95144XL prom XC4044XLA XC9536 XC1700 XC4000EX XC4000XLA XC4020XLA XC4028XLA Text: 100 196 400 576 784 360 616 1,120 1,536 2,016 1,728 2,700 3,888 5,292 6,912 10,800 15,552 21,168 27,648 384 600 864 1,176 1,536 2,400 3,456 4,704 6,144 1,536 2,400 3,456 4,704 6,144 9,600 13,824 18,816 24,576 180 180 260 284 316 404 500 512 612 30 65 130 180	Original	XC1701L XC1702L XC1704L XC95288XL prom X9536XL XC95144XL prom XC4044XLA XC9536 XC1700 XC4000EX XC4000XLA XC4020XLA XC4028XLA	PDF
121C-2 Abstract: XC1765D XC95108 XL mp8000ch4 p103 pot datasheet reliability report PQFP240 XC95xxx 17256d D1 PGA 478 Text: The Reliability Data Program Expanded Version Jan. 1, 2000 Cover P1 TABLE OF CONTENTS Introduction .…4 The Reliability Program. .…4	Original	XC4005XL PQFP-160 PLCC-84, HQFP-304, VQFP-100 XC4044XL XC4013XLA 121C-2 XC1765D XC95108 XL mp8000ch4 p103 pot datasheet reliability report PQFP240 XC95xxx 17256d D1 PGA 478	PDF
vhdl code Wallace tree multiplier Abstract: verilog code for FPGA based games 16 bit wallace tree multiplier verilog code quickturn realizer vhdl code for Wallace tree multiplier XCS20 pin diagram codes for Adders and subtractor xilinx spartan 3 XC4000X XC9572XL XC4000XV Text: XCELL Issue 30 Fourth Quarter 1998 THE QUARTERLY JOURNAL FOR XILINX PROGRAMMABLE LOGIC USERS The Programmable Logic CompanySM Inside This Issue: HARDWARE Editorial . 2 FPGAs New XC4000X Series . 3 3.3V SpartanXL . 4-5	Original	XC4000X XC9500XL XLQ498 vhdl code Wallace tree multiplier verilog code for FPGA based games 16 bit wallace tree multiplier verilog code quickturn realizer vhdl code for Wallace tree multiplier XCS20 pin diagram codes for Adders and subtractor xilinx spartan 3 XC9572XL XC4000XV	PDF
vhdl code Wallace tree multiplier Abstract: 8 bit wallace tree multiplier verilog code 16 bit wallace tree multiplier verilog code analog to digital converter vhdl coding XILINX vhdl code REED SOLOMON encoder de virtex 5 fpga based image processing vhdl code for Wallace tree multiplier block diagram 8x8 booth multiplier XC4000XL EMPOWER 1164 Text: T H E Q U A R T E R LY J O U R N A L F O R P R O G R A M M A B L E L O G I C U S E R S Issue 31 First Quarter 1999 COVER STORY With VIRTEX FPGAs you can defy conventional logic and create the extraordinary NEW TECHNOLOGY Internet Reconfigurable Logic APPLICATIONS	Original		PDF
7448 bcd to seven segment decoder Abstract: 7448 seven segment display data sheet datasheet 7448 BCD to Seven Segment display CI 7448 The 555 Timer Applications Sourcebook interfacing cpld xc9572 with keyboard SERVICE MANUAL OF FLUKE 175 100352 The Transistor Manual Japanese 1993 xc95144 pinout Text: The Programmable Logic Data Book July 1998 R , XILINX, XACT, XC2064, XC3090, XC4005, XC-DS501, FPGA Architect, FPGA Foundry, NeoCAD, NeoCAD EPIC, NeoCAD PRISM, NeoROUTE, Plus Logic, Plustran, P+, Timing Wizard, and TRACE are registered trademarks of Xilinx, Inc.	Original	XC2064, XC3090, XC4005, XC-DS501, VersaR467-9828 7448 bcd to seven segment decoder 7448 seven segment display data sheet datasheet 7448 BCD to Seven Segment display CI 7448 The 555 Timer Applications Sourcebook interfacing cpld xc9572 with keyboard SERVICE MANUAL OF FLUKE 175 100352 The Transistor Manual Japanese 1993 xc95144 pinout	PDF
A23 780-4 Abstract: vhdl code for 8-bit BCD adder star delta wiring diagram with timer CI 7448 XC6200 XC4013XL PIN BG256 100352 The 555 Timer Applications Sourcebook schemat xilinx xc3000a MARKING CODE Text: The Programmable Logic Data Book April 1998 R , XILINX, XACT, XC2064, XC3090, XC4005, XC-DS501, FPGA Architect, FPGA Foundry, NeoCAD, NeoCAD EPIC, NeoCAD PRISM, NeoROUTE, Plus Logic, Plustran, P+, Timing Wizard, and TRACE are registered trademarks of Xilinx, Inc.	Original	XC2064, XC3090, XC4005, XC-DS501, Versa108 XC95144 XC95216 XC95288 XC9536 XC9572 A23 780-4 vhdl code for 8-bit BCD adder star delta wiring diagram with timer CI 7448 XC6200 XC4013XL PIN BG256 100352 The 555 Timer Applications Sourcebook schemat xilinx xc3000a MARKING CODE	PDF