WANDER Search Results

PE-65507

Abstract: PE-65508 65508 A101 PE-65506 PE-65506T PE-65510 RG-179 rg6 coax 6550-7
Contextual Info: FIBRE CHANNEL DUAL TRANSFORMERS For Use with 75 Ω Coaxial or 150 Ω STP Cable Designed for fast rise time and low baseline wander IC grade transfer-molded package withstands 235°C IR reflow Pick & Place compatible Electrical Specifications @ 25°C — Operating Temperature 0°C to 70°C

AN 7104

Abstract: 7104
Contextual Info: FIBRE CHANNEL Dual Transformer 7101-7104 • Designed for use with 75Ω Coaxial or 150Ω STP Cable • Fast rise time and low baseline wander MECHANICAL AND SCHEMATIC All dimensions in inches SUGGESTED PAD LAYOUT SCHEMATIC SELECTION TABLE Baud Rate Coax Cable STP Cable

Enterprise 1500

Contextual Info: BOTHHAND FIBRE CHANNEL DUAL TRANSFORMERS Enterprise Inc. Page 1 of 1 ! Designed for fast rise time and low baseline wander. ! 16 PIN surface mountable. ! Frequency Range 2MHz to 266MHz. ! Designed for FDDI & application. ! Operating temperature range: 0℃ to +70℃.

HI-POT

Abstract: electronic transformer Transformer a10705
Contextual Info: FIBRE CHANNEL DUAL TRANSFORMER P/N: S5508M DATA SHEET Page : 1/ 1 Feature l l l l l For Use with 75O Coaxial Cable. Designed for fast rise time and low baseline wander. Pick &Place compatible. Operating temperature range: -40°C to +85°C. Storage temperature range: -40℃ to +125℃.

LXT6251A

Abstract: LXT6051 LXT6234 LXT6282 muldex G703 LXT380 TU12 6251A LXT625
Contextual Info: product brief Intel LXT6282 Digital Interface Product Description The Intel® LXT6282 digital interface is the telecommunication industry’s first octal E1 digital interface. It is the only solution to simultaneously address the widespread problems of jitter, wander,

MK2049-45ASILFTR

Abstract: ETS300 GR-1244 MAN05 MK2049-34 MK2049-36 MK2049-45A MT9045 TR62411 vcxo 2048 khz
Contextual Info: DATASHEET MK2049-45A 3.3 VOLT COMMUNICATIONS CLOCK PLL Description Features The MK2049-45A is a dual Phase-Locked Loop PLL device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate input

EIA-586-A

Abstract: ADM5104 Beta Transformer Technology C3115 C31150 1000 watt ferrite transformer SD412
Contextual Info: a Low Power Quad NRZ to Transformer Fast Ethernet 110Base-TX Transceiver ADM5104 FEATURES Four 100 TX to Match One Quad Transformer Compliant to 802.3u 110Base-TX Equalization and Base Line Wander Correction Low Power, Typ 300 mW per Channel Differential Transformer Interface for Transmit and

Contextual Info: MK2049-45 3.3V Communications Clock PLL Description Features The MK2049-45 is a dual Phase-Locked Loop PLL device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate

Contextual Info: MK2049-45 3.3V Communications Clock PLL Description The MK2049-45 is a dual Phase-Locked Loop PLL device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate

GR-1244-CORE

Abstract: GR-253-CORE ZL30106 ZL30106QDG "network interface cards"
Contextual Info: ZL30106 SONET/SDH/PDH Network Interface DPLL Data Sheet Features • • • • • • • • October 2004 Synchronizes to clock-and-sync-pair to maintain minimal phase skew between inputs and outputs Supports output wander and jitter generation specifications for SONET/SDH and PDH

Contextual Info: DATASHEET MK2049-44 3.3 VOLT COMMUNICATIONS CLOCK PLL Description Features The MK2049-44 is a dual Phase-Locked Loop PLL device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate input

Contextual Info: 125 Series GPSDO Product Comparison Model Number Wi125 1PPS Holdover excludes aging Jitter (@10Hz) Voltage Temp Range Lock to External 1PPS Lock to External 10MHz Wander Generation Yes ≤ 600 PPB N/A 3.3 Vdc -30 to 80°C No No N/A FTS125-CTV Yes ≤ 600 PPB

fc-638l

Abstract: GTS FC-638L fc-638 FC638L 40ST1041AX H1164 RTL8208 100base AA100 AA111
Contextual Info: RTL8208 REALTEK SINGLE CHIP OCTAL 10/100 MBPS FAST ETHERNET TRANSCEIVER RTL8208 7.4.2 Receive Function . 21 7.4.3 Link Monitor . 22 7.4.4 Baseline Wander Compensation . 23

GR-1244-CORE

Abstract: BELLCORE GR-1244-CORE
Contextual Info: SY0010 SYNCHRONOUS EQUIPMENT CLOCK STRATUM 3/3E The SY0010 is an accurate time and frequency source that has been designed as a module level subsystem. The SY0010 is an excellent synchronization solution for timing, jitter and wander topics, in compliance with telecommunication standards

HFAN-9

Abstract: KC 0898 HFAN-09
Contextual Info: Application Note: HFAN-09.0.4 Rev.1; 04/08 NRZ Bandwidth – LF Cutoff and Baseline Wander Maxim Integrated Products NRZ Bandwidth – LF Cutoff and Baseline Wander 1 Introduction A fundamental goal when designing physical-layer digital communication systems is transmission of the

transformer

Abstract: TRANSFORMER CT surface mount S5871
Contextual Info: T1/CEPT/DS3 DUAL SURFACE MOUNT TRANSFORMER P/N:S5871 DATA SHEET A. General Specifications: 1. Designed for fast rise time and low baseline wander 2. IC grade transformer-molded package with stands 235° C IR reflow 3. Pick & place compatible 4. Operating temperature range : 0°C to +70°C

pe-65508

Abstract: PE-65508NL PE-65507 65508 65510 PE-65506 PE-65506T PE-65510 PE-65506NL pe65508nl
Contextual Info: FIBRE CHANNEL DUAL TRANSFORMERS For Use with 75Ω Coaxial or 150Ω STP Cable Designed for fast rise time and low baseline wander IC grade transfer-molded package withstands 235°C IR reflow Pick & Place compatible Electrical Specifications @ 25°C — Operating Temperature 0°C to 70°C

TDS540

Abstract: ML6673 nrzi circuit diagram MLT-3 pattern generator for eye TDS820 ML6673EVAL prbs generator Tektronix CSA90 prbs pattern generator
Contextual Info: JULY 1995 Application Brief 3 ML6673 and Baseline Wander PROBLEM DEFINITION Broad acceptance of high performance networking protocols ¾ such as FDDI and Fast Ethernet ¾ will be eased by enabling the transmission of these protocols over the existing copper cable infrastructure. This application brief

L80225

Abstract: HALO TG22-3506ND TG22-3506ND LINK100 ssd schematic l80225/b LSI L80225
Contextual Info: L80225 10/100 MbpsTX/10BT Ethernet Physical Layer Device PHY Technical Manual Features • Single Chip 100Base-TX /10Base-T physical layer solution • On-chip wave shaping - no external filters required • Dual Speed - 10/100 Mbps • Baseline Wander Correction

Digital Alarm Clock by ttl

Abstract: Digital Alarm Clock on ttl G-737 M7418
Contextual Info: SA2030 sames SA2030 PCM FRAME ALIGNER FEATURES n Frame Alignment Recovery and loss in accordance with CCITT recommendations G.732 and G.737 n Indication of Slip, loss of frame synchronisation, and loss of route clock conditions. n Jitter and phase-wander immunity

ETS300

Abstract: GR-1244 MAN05 MK2049-34 MK2049-36 MK2049-45A MK2069 MT9045 TR62411 crystal 27 MHz
Contextual Info: DATASHEET MK2049-45A 3.3 VOLT COMMUNICATIONS CLOCK PLL Description Features The MK2049-45A is a dual Phase-Locked Loop PLL device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate input

LXT6234

Abstract: LXT6282 E1 HDB3
Contextual Info: Data Sheet MARCH 1999 Revision 2.0 LXT6282 Octal E1 Digital Interface with CRC-4 Monitoring and Jitter/Wander Suppression General Description Features LXT6282 is an eight-channel E1 digital interface. It integrates an E1 dejitter phase locked loop, an E1 retiming

Contextual Info: DATASHEET MK2049-45A 3.3 VOLT COMMUNICATIONS CLOCK PLL Description Features The MK2049-45A is a dual Phase-Locked Loop PLL device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate input

Contextual Info: MK2049-45 3.3V Communications Clock PLL Description The MK2049-45 is a dual Phase-Locked Loop PLL device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate