VDR 1016 Search Results

Contextual Info: AS6C1016 64K X 16 BIT LOW POWER CMOS SRAM REVISION HISTORY Revision Rev. 1.0 Rev. 1.1 Rev. 1.2 Rev. 1.3 Rev. 1.4 Alliance Memory, Inc. Rev. 1.4 Description Initial Issue Revised FEATURES & ORDERING INFORMATION Lead free and green package available to Green package

22302

Abstract: DK 04 tsm 1002 BZ147 22301B
Contextual Info: fast switching thyristors > 1OOArms thyristors rapides > lO O Aeff THOMSON-CSF - Tamb Types •o ■t s m * VT N |/ 10 ms Vr r m V DR M A 100 A rm s / l e a s e = 80°C DK DK DK DK DK DK DK DK DK 1001 1002 1004 1006 1008 1010 1012 1014 1016 F (B,Z,Y,A,X,W)

AS6C1016

Abstract: sram 64k 64k x 8 sram
Contextual Info: OCTOBER 2007 January 2007 AS6C1016 X 8CMOS BIT LOW POWER CMOS SRAM 64K X 16 BIT LOW512K POWER SRAM FEATURES GENERAL DESCRIPTION Fast access time : 55ns Low power consumption: Operating current : 20mA TYP. Standby current : 2 A (TYP.) Single 2.7V ~ 5.5V power supply

AS6C1016

Abstract: AS6C1016-55ZIN
Contextual Info: OCTOBER 2007 January 2007 AS6C1016 X8 BIT SRAM LOW POWER CMOS SRAM 64K X 16 BIT LOW512K POWER CMOS FEATURES GENERAL DESCRIPTION Fast access time : 55ns Low power consumption: Operating current : 20/18mA TYP. Standby current : 2 A (TYP.) Single 2.7V ~ 5.5V power supply

67164

Abstract: 0E12 UT67164 SRAM flatpack
Contextual Info: Standard Products UT67164 Radiation-Hardened 8K x 8 SRAM - SEU Hard Data Sheet December 1999 FEATURES q 55ns maximum address access time, single-event upset less than 1.0E-10 errors//bit day -55oC to 125+oC q Asynchronous operation for compatibility with industrystandard 8K x 8 SRAM

tefr1

Abstract: 0E12 UT67164
Contextual Info: Standard Products UT67164 Radiation-Hardened 8K x 8 SRAM - SEU Hard Data Sheet December 1997 FEATURES q 55ns maximum address access time, single-event upset less than 1.0E-10 errors//bit day -55oC to 125+oC q Asynchronous operation for compatibility with industrystandard 8K x 8 SRAM

Contextual Info: Standard Products UT67164 Radiation-Hardened 8K x 8 SRAM - SEU Hard Data Sheet December 1997 FEATURES q 55ns maximum address access time, single-event upset less than 1.0E-10 errors//bit day -55oC to 125+oC q Asynchronous operation for compatibility with industrystandard 8K x 8 SRAM

XC6403/04F

Contextual Info: ◆Low Power Consumption : 35 A TYP. ◆Dropout Voltage : 200mV @ 100mA : 400mV @ 200mA ◆Maximum Output Current : More Than 500mA (600mA limit) (2.5V≦VROUT≦4.9V) ◆Highly Accurate : ±2% ◆VR Setting Output Voltage Range : 0.9V ~ 5.6V [XC6403] : 0.9V ~ 5.1V [XC6404]

ecu bosch 7.4.4

Abstract: tle 4417 ecu bosch 7.4.5 smd transistor wk3 tle4417 sen 1327 gas sensor ecu bosch 7.4.6 bosch ecu schematic ecu bosch 7.4.3 bosch ecu pinout
Contextual Info: D a t a B o o k, R e v . 1 . 0, J a n . 20 0 4 Supply & Communications V o l t a g e R eg u l a t o r , L E D - D r i v e r , DC/DC-Converter, Bus-Transceiver Automotive Power N e v e r s t o p t h i n k i n g . Edition 2004-01-01 Published by Infineon Technologies AG,

0E12

Abstract: UT67164
Contextual Info: Standard Products UT67164 Radiation-Hardened 8K x 8 SRAM - SEU Hard Data Sheet January 2002 FEATURES q 55ns maximum address access time, single-event upset less than 1.0E-10 errors//bit day -55o C to 125+oC q Asynchronous operation for compatibility with industrystandard 8K x 8 SRAM

B57301

Abstract: 76665 A003 B57301K0103A003 K301 NTC probe temperature vs resistance
Contextual Info: NTC thermistors for temperature measurement Probe assemblies Series/Type: Date: B57301 March 2006 EPCOS AG 2006. Reproduction, publication and dissemination of this publication, enclosures hereto and the information contained therein without EPCOS' prior express consent is prohibited.

epcos 565-2

Abstract: 565-2 EPCOS c 565-2 epcos 1322 EPCOS B25 160 74672 k227 ntc k227 B57227 B57227K0333A001
Contextual Info: NTC thermistors for temperature measurement Probe assemblies Series/Type: Date: B57227 March 2006 EPCOS AG 2006. Reproduction, publication and dissemination of this publication, enclosures hereto and the information contained therein without EPCOS' prior express consent is prohibited.

Contextual Info: H Y 6 2 8 1 0 0 A -HYUNDAI S e r ie s 128KX 8-bit CMOS SRAM PRELIMINARY DESCRIPTION The HY628100A is a high-speed, low power and 131,072 x 8-bits CMOS static RAM fabricated using Hyundai’s high performance twin tub CMOS process technology. This high reliability process coupled with innovative circuit

Contextual Info: HY62QF16404D Series 256K X 16bit full CMOS SRAM Preliminary DESCRIPTION FEATURES The HY62QF16404D is a high speed, super low power and 4Mbit full CMOS SRAM organized as 256K words by 16bits. The HY62QF16404D uses high performance full CMOS process technology

kor 2001

Contextual Info: H Y 6 2Q F 164 06 C Series 256K X 16bit full CMOS SRAM DESCRIPTION FEATURES The H Y62Q F16406C is a high speed, super low power and 4Mbit full CM O S SRAM organized as 256K words by 16bits. The HY62Q F16406C uses high performance full CM O S process technology

Contextual Info: H Y 6 2 V 8 1 0 0 A S e r ie s 128Kx8-blt CMOS SRAM »HYUNDAI PRELIMINARY DESCRIPTION The HY62V8100A is a high-speed, low power and 131,072 x 8-bits CMOS static RAM fabricated using Hyundai’s high performance twin tub CMOS process technology. The HY62V8100A has a data retention mode that

Contextual Info: HY62UF16406D Series 2 5 6 K x 1 6 b it fu ll C M O S S R A M Preliminary DESCRIPTION FEATURES The HY62UF16406D is a high speed, super low power and 4Mbit full CMOS SRAM organized as 256K words by 16bits. The HY62UF16406D uses high performance full CMOS process technology

128 half-size alphanumeric characters and symbols

Abstract: KSD 302 KSD1 140 4027 ram KSD 303 7 segment display 2003 cc ksd 302 transistor KSD1 105 TRANSISTOR c 5578 B KSD1 65
Contextual Info: HD66732 Graphics Liquid Crystal Display Controller/Driver Supporting JIS Level-1 and Level-2 Kanji ROM Rev 1.0 Jun. 1st, 1998 Description The HD66732 is a dot-matrix liquid crystal display (LCD) controller and driver LSI that displays 11-by-12 dot Japanese characters consisting of kanji and hiragana according to the Japanese Industrial Standard (JIS)

Contextual Info: S G S-THOnSON a?» d 1 7^ 5 ^ 5 3 7 D D 1 D 4 5 S 1 M OSTEK FEATURES □ JEDEC LVTTL standard +3.3 volt operation □ 25, 35 and 45 ns Address Access Time □ Equal access and cycle times □ 20-pin, 300 mil Plastic and Ceramic DIP □ All input and output pins TTL compatible, low

Contextual Info: VITELIC CORP Tfl VITELIC Ì>E| TS0S310 DDDD303 T 23-12 V61C35 FAMILY HIGH PERFORMANCE LOW POWER 2 Kx 8 DUAL PORT MEMORY Description Features • 2K x 8 bit CM OS Static RAM with 3-state outputs ■ High Speed Multiplexed Dual Port operation • 55ns, 70ns, 90ns, 120ns access time

hitec 4678

Abstract: KSD 303 CS 20A TRANSISTOR ECG 377 ksd 168 ksd 301 TRANSISTOR c 5578 B transistor c 5855 Nippon capacitors 6114
Contextual Info: HD66732 Graphics Liquid Crystal Display Controller/Driver Supporting JIS Level-1 and Level-2 Kanji ROM ADE-207-314(Z) Rev 1.2 Aug, 1999 Description The HD66732 is a dot-matrix liquid crystal display (LCD) controller and driver LSI that displays 11-by-12

Contextual Info: RPR 2 0 '993 HM621664H Series Preliminary 65536-Word X 16-Bit High Speed CMOS Static RAM Rev. 2 Jun.16,1992 ^ H IT A C H I T he H M 6 2 1 6 6 4 H is an asyncronous high speed static R A M organized as 64 kword x 16 b it It realize high speed access time 15/20/25 ns with

M6264

Abstract: HM6264LM-90 hm6264lwm-70 HM6264LM HM6264L 6264lm
Contextual Info: HM 6264m ,HIV16264LR,HM 6264LK,HM 6264LM ,7 ?TW l 8K X 8 CMOS STATIC General D e scrip tio n The HM6264L is a 65,536-bit static random access memory organized as 8,192 words by 8 bits and operates from a single 5 volt supply. It is built with high performance twin tub CMOS process. Inputs

TCA 965

Contextual Info: MK41L68/MK41 L69 N,P -25|35(45 4K X 4 C M O S S T A T IC R A M P R E L IM IN A R Y MEMORY COMPONENTS FEATURES A, □ JEDEC LVTTL Standard +3.3 volt operation 1 z z z z Z • a5 2 Z □ 25, 35 and 45 ns Address Access Time A6 3 z □ Automatic Power-up Clear