V53C404 Search Results

Contextual Info: bEE » MOSEL-VITELIC MOSEL- VITELIC • baSBB^l DDGSOSb 170 ■ MOVI V53C404F HIGH PERFORMANCE, LOW POWER 1 M X 4 BIT FAST PAGE MODE CMOS D YNAMIC RAM H IG H P E R F O R M A N C E V 5 3 C 4 0 4 F Max. RAS Access Time, tRAf. PRELIMINARY 6 0 /6 0 L 7 0 /7 0 L

Contextual Info: M O S E L VITELIC V53C 404B H IG H PER FO R M AN C E, L O W PO W ER 1 M X 4 B IT F A S T P A G E M O D E C M O S D Y N A M IC R A M HIGH PERFORMANCE V53C404B 60 70 80 10 Max. RAS Access Time, tRAC 60 ns 70 ns 80 ns 100 ns Max. Column Address Access Time, (1rA A )

Contextual Info: M O SE L VÊTELIC V53C404B HIGH PERFORMANCE, LOW POWER 1 M X 4 BIT FAST PAGE MODE CMOS DYNAMIC RAM 60 70 80 10 M ax. RAS Access Time, 1RAC 60 ns 70 ns 80 ns 100 ns M ax. Column Address Access Tim e, (tCAA) 30 ns 35 ns 40 ns 50 ns HIGH PERFORMANCE V53C404B

Contextual Info: MOSEL VITEUC V 53C 404D H IG H P E R F O R M A N C E , L O W P O W E R 1 M X 4 B IT F A S T P A G E M O D E C M O S D Y N A M IC R A M HIGH PERFORMANCE V53C404D 60 70 80 10 Max. RAS Access Time, tRAC 60 ns 70 ns 80 ns 100 ns Max. Column Address Access Time, (tCAA)

Contextual Info: An m im y V1TELIC V53C404 HIGH PERFORMANCE, LO W POWER 1 M X 4 B IT FAST PAGE MODE CMOS DYNAMIC RAM PRELIMINARY 7 0 /7 0 L 8 0 /8 0 L 1 0 /10L Max. RAS Access Time, tRAC 70 ns 80 ns 100 ns Max. Column Address Access Time, {tCAA) 35 ns 40 ns 50 ns Min. Fast Page Mode Cycle Time, ( t ^ )

V53C404BK

Contextual Info: MOSEL VITELIC HIGH PERFORMANCE V53C404D 60 70 80 10 Max. RAS Access Time, tRAC 60 ns 70 ns 80 ns 100 ns Max. Column Address Access Time, (tCAA) 30 ns 35 ns 40 ns 50 ns Min. Fast Page Mode Cycle Time, (tPC) 40 ns 45 ns 50 ns 60 ns Min. Read/Write Cycle Time, (tRC)

RC CAR

Abstract: V53C8256H V53C404
Contextual Info: MOSEL VITELIC V53C404H 1M x 4 FAST PAGE MODE CMOS DYNAMIC RAM HIGH PERFORMANCE PRELIMINARY V53C404H 40 45 50 60 Max. RAS Access Time, tRAC 40 ns 45 ns 50 ns 60 ns Max. Column Address Access Time, (tCAA) 20 ns 22 ns 24 ns 30 ns Min. Fast Page Mode Cycle Time, (tPC)

HH2C

Contextual Info: An m im y V1TELIC V53C404 HIGH PERFORMANCE, LO W POWER 1 M X 4 B IT FAST PAGE MODE CMOS DYNAMIC RAM PRELIMINARY 7 0 /7 0 L 8 0 /8 0 L 1 0 /10L Max. RAS Access Time, tRAC 70 ns 80 ns 100 ns Max. Column Address Access Time, {tCAA) 35 ns 40 ns 50 ns Min. Fast Page Mode Cycle Time, ( t ^ )

Contextual Info: ff ‘ I VITELIC V53C404 FAMILY HIGH PERFORMANCE, LOW POWER 1 M X 4 BIT, FAST PAGE MODE CMOS DYNAMIC RAM HIGH PERFORMANCE V53C404 ADVANCED 60/60L 70/70L 80/80L Max. RAS Access Time, tRAC 60 ns 70 ns 80 ns Max. Column Address Access Time, (tCAA) 30 ns 35 ns

Contextual Info: M O SEL V rTE U C V53C404D HIGH PERFORMANCE, LOW POWER 1M X 4 B IT FAST PAGE MODE CMOS DYNAMIC RAM HIGH PERFORMANCE V53C404D V53C404D 60 70 80 Max, RAS Access Time, 1RAC 60 ns 70 ns 80 ns Max. Column Address Access Time, (tCAA) 30 ns 35 ns 40 ns 50 ns Min. Fast Page Mode Cycle Time, (tp c )

V53C8256H

Abstract: DD03b
Contextual Info: M OSEL VITELIC P R E LIM IN A R Y V53C404H 1M x 4 F A S T P A G E M O D E C M O S D Y N A M IC R A M HIGH PERFORMANCE 40 45 50 60 Max. RAS Access Time, Irac 40 ns 45 ns 50 ns 60 ns Max. Column Address Access Time, (tCAA) 20 ns 22 ns 24 ns 30 ns Min. Fast Page Mode Cycle Time, (tPC)

Contextual Info: MOSEL- VITELIC V53C404F HIGH PERFORMANCE, LOW POWER 1 M X 4 BIT FAST PAGE MODE CMOS DYNAMIC RAM PRELIMINARY 60/60L 70/70L 80/80L 10/10L M ax. RA S Access Tim e, tRAC 60 ns 7 0 ns 80 ns 100 ns M ax. Column Address Access Tim e, (tfA A ) 30 ns 35 ns 4 0 ns

Contextual Info: if “ VITELIC V53C404 HIGH PERFORMANCE, LO W POWER 1 M X 4 B IT FAST PAGE MODE CMOS DYNAMIC RAM PRELIMINARY 70/70L 80/80L 10/10L Max. RAS Access Time, tRAC 70 ns 80 ns 100 ns Max. Column Address Access Time, (tCAA) 35 ns 4 0 ns 50 ns Min. Fast Page Mode Cycle Time, (tpç)

Contextual Info: M O SEL VÊTEUC V 53C 404D H IG H P E R F O R M A N C E , L O W P O W E R 1 M X 4 B IT F A S T P A G E M O D E C M O S D Y N A M IC R A M HIGH PERFORMANCE V53C404D 60 70 80 10 Max. RAS Access Time, tRAC 60 ns 70 ns 80 ns 100 ns Max. Column Address Access Time, (trA A )

Contextual Info: M O SEL VITELIC PR ELIM IN AR Y V53C404H 1 M x 4 FA S T PAGE M ODE CM OS DYNAM IC RAM 40 45 50 60 Max. RAS Access Time, Orac 40 ns 45 ns 50 ns 60 ns Max. Column Address Access Time, ^ aa ) 20 ns 22 ns 24 ns 30 ns Min. Fast Page Mode Cycle Time, (ipc) 23 ns

AC 1501

Abstract: CAS20
Contextual Info: MOSEL-VITELIC Features • ■ ■ ■ ■ ■ ■ ■ ■ PRELIMINARY V404J32/36 V404J32 and V404J36 1M x 32 and 1M x 36 CMOS MEMORY MODULES Description 1,048,576 x 32/36 bit organization Utilizes 1M x 4 CMOS DRAMs Fast access times: 80 ns, 100 ns Fast Page mode operation

Contextual Info: MOSEL-VITELIC fc.2E D MOSEL-VITELIC • V404J8 and V404J9 1MX9, 1 M X 8 B IT FA ST PAGE MODE CMOS DYNAMIC RAM M EM ORY MODULE HIGH PERFORMANCE V404J8/9 tp^ç 60/60L 70/70L 7 0 ns 8 0 ns 100 35 ns 4 0 ns 50 ns Min. Fast Page M ode Cycle Tim e, (tp c ) 4 5 ns

Contextual Info: w * i VITELIC V404J9 and V404J8 1M X 9, 1 M X 8 B IT FAST PAGE MODE CMOS DYNAMIC RAM MEMORY MODULE 70/70L 80/80L 10/10L Max. RAS Access Time, tRAC 70 ns 80 ns 100 ns Max. Column Address Access Time, (tCAA) 35 ns 40 ns 50 ns Min. Fast Page Mode Cycle Time, (tpc)

Contextual Info: MOSEL-VITELIC V404J8 a nd V404J9 P R E L IM IN A R Y 1MX9, 1 M X 8 B IT F A S T P A G E M O D E C M O S D Y N A M IC R A M M E M O R Y M O D U L E 60/60L 70/70L 80/80L 10/10L Max. RAS Access Time, tRAC 60 ns 70 ns 80 ns 100 ns HIGH PERFORMANCE V404J8/9 Max. Column Address Access Time, (tCAA)

Contextual Info: M O S E L V IT E L I C V404J8 a n d V404J9 1M X 9, 1 M X 8 B IT FAST PAGE MODE CMOS DYNAMIC RAM MEMORY MODULE 60/60L 70/70L 80/80L 10/10L M ax. RAS Access Tim e, tRAC 60 ns 70 ns 80 ns 100 ns M ax. Column Address Access Tim e, (tCAA) 30 ns 35 ns 40 ns 50 ns