21171-BA
Abstract: 21171-CA DECchip 21164 SIGNAL PATH designer
Text: Digital Semiconductor DECchip 21171 Core Logic Chipset Product Brief March 1995 Description The DECchip 21171 core logic chipset provides a cost-effective solution for designing high-performance, uniprocessor systems using Digital’s Alpha 21164 microprocessor. The chipset includes an interface to a 32- or 64-bit PCI local bus
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64-bit
21171-CA
383-pin
208-pin
21171-BA
DECchip
21164
SIGNAL PATH designer
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21071-BA
Abstract: 21064A 21071BA 21071DA 21071-DA DECchip dma controller chip
Text: Digital Semiconductor DECchip 21071 and DECchip 21072 Core Logic Chipsets Product Brief March 1995 Description The DECchip 21071 and DECchip 21072 core logic chipsets provide a costeffective solution for designing uniprocessor systems using the 21064 family of
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21071-CA
21071-DA
21071-BA
208-pin
21071-BA
21064A
21071BA
21071DA
21071-DA
DECchip
dma controller chip
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Untitled
Abstract: No abstract text available
Text: 1 D E C c h i p 21171 C o r e Logi c C h i p s e t Overview The DECchip 21171 core logic chipset 21171 is used to su p p o rt the Alpha 21164 microprocessor (21164) in high-perform ance uniprocessor systems. The chipset includes an interface to the 64-bit p erip he ral com ponent interconnect
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64-bit
21171-CA
2574F)
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mb86904
Abstract: STP1012PGA STP1012PGA-85 microsparc RISC processor STP2001 SPARC v8 architecture BLOCK DIAGRAM MB8690 microsparc SPARC 7 sparc v8
Text: STP1012 July 1997 microSPARC -II DATA SHEET SPARC v8 32-Bit Microprocessor With DRAM Interface DESCRIPTION The microSPARC-II 32-bit microprocessor is a highly integrated, high-performance microprocessor. Implementing the SPARC Architecture v8 specification, it is ideally suited for low-cost uniprocessor applications.
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STP1012
32-Bit
STP1012PGA-70A
STP1012PGA-85
STP1012PGA-110
mb86904
STP1012PGA
STP1012PGA-85
microsparc RISC processor
STP2001
SPARC v8 architecture BLOCK DIAGRAM
MB8690
microsparc
SPARC 7
sparc v8
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upa64
Abstract: UPA128 STP221
Text: S un M icroelectronics July 1997 u se Uniprocessor System Controller DATA SHEET D e s c r ip t io n The Uniprocessor System Controller USC has a DRAM memory controller and functions to regulate the flow of requests and data on the UPA bus. It also controls the resets going to all UPA clients.
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SS-10/SS-20-type
128-MB
225-pin
STP2200ABGA-83
STP2200ABGA-100
upa64
UPA128
STP221
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Untitled
Abstract: No abstract text available
Text: MIPI UniPro M-PHY Protocol Triggering and Decode for Infiniium Series Oscilloscopes Data Sheet This application is available in the following license variations. • Order N8808A for a user-installed license • Order option 052 for a factory-installed license
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N8808A
N5435A
5991-1595EN
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c151A
Abstract: C273A C342A r133a C327A R227A C337A c347a BC147A C352A
Text: A INTEL PENTIUM® II/PENTIUM® III PROCESSOR SC242 / INTEL 810e CHIPSET UNIPROCESSOR CUSTOMER REFERENCE SCHEMATICS REVISION 1.0 Title A Page Cover Sheet 1 Block Diagram SC242 Connector 2 Clock Synthesizer 5 82810e Display Cache 6, 7, 8 9 System Memory
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SC242)
SC242
82810e
ULTRA-ATA66
C299A
C290A
C280A
C278A
C277A
C276A
c151A
C273A
C342A
r133a
C327A
R227A
C337A
c347a
BC147A
C352A
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SPARC v9 architecture BLOCK DIAGRAM
Abstract: No abstract text available
Text: Preliminary STP1100BGA July 1997 microSPARC -IIep DATA SHEET SPARC v8 32-Bit Microprocessor With PCI/DRAM Interfaces DESCRIPTION The microSPARC-IIep 32-bit microprocessor is a highly integrated, high-performance microprocessor. Implementing the SPARC Architecture version 8 specification, it is ideally suited for low-cost uniprocessor
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STP1100BGA
32-bit
32-entry
16-entry
STP1100BGA-100
SPARC v9 architecture BLOCK DIAGRAM
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A35 equivalent
Abstract: tp084 74AS07 TP096 IC 74HC112 FDC37C932 CRYSTAL 14.318MHZ processor pentium 1 82443BX CK100
Text: A B C D E Intel 100 MHz Pentium tm II processor/440BX AGPset Uniprocessor Customer Reference Schematics 4 Revision 1.0 4 * Please note that these schematics are subject to change. PAGE TITLE 3 2 1 COVER SHEET 1 BLOCK DIAGRAM 2 SLOT 1 CONNECTOR 3,4 CLOCK SYNTHESIZER
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processor/440BX
82443BX
82443BX
FM5-62
440BX
A35 equivalent
tp084
74AS07
TP096
IC 74HC112
FDC37C932
CRYSTAL 14.318MHZ
processor pentium 1
CK100
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XCM 06
Abstract: UltraSPARC ii STP2220BGA
Text: S un M i c r o e l e c t r o n i c » lis e Uniprocessor System Controller Data Sheet Decem ber 1996 STP2200BG A Sun microsystems S TP 2 2 0 0 B G A S un M ic r o elec tr o n ic s December 1996 use Uniprocessor System Controller DATA SHEET D esc r ip tio n
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STP2200BG
SS-10/SS-20-type
128-MB
XCM 06
UltraSPARC ii
STP2220BGA
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mb86904
Abstract: MB8690 microsparc M Meiko microsparc I microsparc 1
Text: S un M icro electro nics July 19 97 microSPARC -ll DATA SHEET SPARC v8 32-Bit Microprocessor With DRAM Interface D e s c r ip t io n The microSPARC-II 32-bit microprocessor is a highly integrated, high-performance microprocessor. Imple menting the SPARC Architecture v8 specification, it is ideally suited for low-cost uniprocessor applications.
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32-bit
STP1012PGA-70A
TP1012PG
1012PG
STP1012
mb86904
MB8690
microsparc
M Meiko
microsparc I
microsparc 1
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Untitled
Abstract: No abstract text available
Text: aTCA-9300 Intel Xeon® E3 Quad-Core 10 Gigabit Ethernet AdvancedTCA® Processor Blade Features AdvancedTCA Intel® Xeon® E3 Quad-Core or Core i3 Dual-Core Uniprocessor DDR3 1600/ECC memory up to 32 GB maximum capacity Intel® C216 chipset Single AMC.0 Mid-size bays
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aTCA-9300
1600/ECC
10GBASE-KX4/1000BASE-BX
E3-1275V2
DDR3-1600
aTCA-9300/S1275V2/AMC
aTCA-9300/S3220
1275V2
aTCA-9300/S1225V2/AMC
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STP1100BGA-100
Abstract: "32-Bit Microprocessor" SPARC v8 architecture BLOCK DIAGRAM SPARC V8
Text: Preliminary STP1100BGA July 1997 microSPARC -IIep DATA SHEET SPARC v8 32-Bit Microprocessor With PCI/DRAM Interfaces DESCRIPTION The microSPARC-IIep 32-bit microprocessor is a highly integrated, high-performance microprocessor. Implementing the SPARC Architecture version 8 specification, it is ideally suited for low-cost uniprocessor
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STP1100BGA
32-Bit
32-entry
16-entry
STP1100BGA-100
STP1100BGA-100
"32-Bit Microprocessor"
SPARC v8 architecture BLOCK DIAGRAM
SPARC V8
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NEC c317
Abstract: mov rdn 240 MOV RDN 240/ 12 txc 14.318MHZ PC MOTHERBOARD CIRCUIT diagram intel 810 c141 nec 1.5 KE 56 A c209 diode bjt transistor c243 nec c277 ftd-11
Text: 8 7 6 5 4 3 2 1 INTEL R CELERON(TM) PROCESSOR (PPGA)/INTEL(R) 810 CHIPSET UNIPROCESSOR CUSTOMER REFERENCE SCHEMATICS REVISION 1.3 D C B A D TITLE PAGE Cover Sheet Block Diagram 370-Pin Socket GTL Termination Clock Synthesizer GMCH Frame Buffer DIMM Sockets
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370-Pin
ATA33
174ohm,
178ohm,
2200pF
047uF
SiI154
330ohm
150ohm
NEC c317
mov rdn 240
MOV RDN 240/ 12
txc 14.318MHZ
PC MOTHERBOARD CIRCUIT diagram intel 810
c141 nec
1.5 KE 56 A c209 diode
bjt transistor c243
nec c277
ftd-11
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741G08
Abstract: HL6 smd npn transistor bc148 datasheet 2N3904 H36 BC137 BC148 BC118 BC148 pin configuration SMD RA3 PNP R234A
Text: A INTEL PENTIUM® III & INTEL® CELERON R PROCESSOR/ 810E2 CHIPSET UNIVERSAL SOCKET 370 PLATFORM UNIPROCESSOR CUSTOMER REFERENCE SCHEMATICS REVISION 1.0 Title A Page Cover Sheet 1 Block Diagram 370-pin socke t 2 3,4 A G T L T e rmination Clock Synthesi zer
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810E2
370-pin
82810e
BC163
741G08
HL6 smd
npn transistor bc148 datasheet
2N3904 H36
BC137
BC148
BC118
BC148 pin configuration
SMD RA3 PNP
R234A
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SPARC v8 architecture BLOCK DIAGRAM
Abstract: dram virtual physical mapping page size content addressable memory cache of translation lookaside buffer content Cache Controller SPARC
Text: Chapter 1 The TurboSPARC Microprocessor The TurboSPARC microprocessor is a high frequency, highly integrated single-chip CPU. Implementing the SPARC architecture V8 specification, the TurboSPARC is ideally suited for low-cost uniprocessor applications. The TurboSPARC microprocessor provides balanced integer and floating point performance in a single VLSI component, implementing a Harvard-style architecture with separate instruction and data busses. Large 16 KByte
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64-bit
16-entry
SPARC v8 architecture BLOCK DIAGRAM
dram virtual physical mapping page size
content addressable memory
cache of translation lookaside buffer content
Cache Controller SPARC
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Untitled
Abstract: No abstract text available
Text: STP2200ABGA S un M ic r o e l e c t r o n ic s July 1997 use Uniprocessor System Controller DATA SHEET D e s c r ip t io n The Uniprocessor System Controller USC has a DRAM m em ory controller and functions to regulate the flow of requests and data on the UPA bus. It also controls the resets going to all UPA clients.
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STP2200ABGA
SS-10/S
-20-type
128-MB
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PDF
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Untitled
Abstract: No abstract text available
Text: Agilent U7249A MIPI M-PHY Compliance Test Software for Infiniium Oscilloscopes Data Sheet Validate and debug the electrical performance of your embedded MIPI M-PHYSM data links, including DigRF v4SM, UniProSM and LLISM protocols quickly and easily Introduction
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U7249A
5990-8933EN
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A6129
Abstract: A6152 processor diagram 110B TR12 A6140-01
Text: Microprocessor Initialization and Configuration 17 This chapter covers microprocessor initialization and configuration information for both uniprocessor and dual-processor implementations of the embedded Pentium processor family. For configuration information on symmetric dual-processing mode, refer to “Managing and Designing
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instruction set Sun SPARC T3
Abstract: sparc v8 SPARC v8 architecture BLOCK DIAGRAM sun sparc v5 microsparc microsparc RISC processor SPARC 7 WD 969 microsparc I STP1100BGA-100
Text: Preliminary STP1100BGA December 1997 microSPARC -IIep DATA SHEET SPARC v8 32-Bit Microprocessor With PCI/DRAM Interfaces DESCRIPTION The microSPARC-IIep 32-bit microprocessor is a highly integrated, high-performance microprocessor. Implementing the SPARC Architecture version 8 specification, it is ideally suited for low-cost uniprocessor
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STP1100BGA
32-Bit
32-entry
16-entrNo
instruction set Sun SPARC T3
sparc v8
SPARC v8 architecture BLOCK DIAGRAM
sun sparc v5
microsparc
microsparc RISC processor
SPARC 7
WD 969
microsparc I
STP1100BGA-100
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PDF
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sparc v8
Abstract: microsparc microsparc I SPARC T4
Text: S un M icro electro nics July 1997 microSPARC -llep DATA SHEET SPARC v8 32-Bit Microprocessor With PCI/DRAM Interfaces D e s c r ip t io n The microSPARC-IIep 32-bit microprocessor is a highly integrated, high-performance microprocessor. Imple menting the SPARC Architecture version 8 specification, it is ideally suited for low-cost uniprocessor
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32-bit
32-entry
16-entry
sparc v8
microsparc
microsparc I
SPARC T4
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PDF
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upa64
Abstract: STP2001 STP2200ABGA STP2210QFP STP2220ABGA STP2222ABGA STP2230SOP AN/USC-43
Text: STP2200ABGA July 1997 USC Uniprocessor System Controller DATA SHEET DESCRIPTION The Uniprocessor System Controller USC has a DRAM memory controller and functions to regulate the flow of requests and data on the UPA bus. It also controls the resets going to all UPA clients.
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STP2200ABGA
SS-10/SS-20-type
128-MB
DescriptionSTP2200ABGA-83
1997Document
802-7953-02ORDERINGINFORMATION
838MHz
ControllerSTP2200ABGA-100
1008MHz
upa64
STP2001
STP2200ABGA
STP2210QFP
STP2220ABGA
STP2222ABGA
STP2230SOP
AN/USC-43
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Untitled
Abstract: No abstract text available
Text: :m 15 NEC VR4000SC juPD30401 RISC Microprocessor NEC Electronics Inc. Preliminary Description The VR4000SC is a 64-bit RISC microprocessor that delivers excellent processing solutions in a wide vari ety of applications. Typical applications are in highperformance uniprocessor systems with large second
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VR4000SC
juPD30401
VR4000SCâ
64-bit
VR4000SC
R2000,
R3000,
R6000
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Socket S1g1
Abstract: AMD Turion 64 Mobile Technology AM2 amd amd AM2 opteron pin package HTC B834 Socket S1g1 Processor Functional AMD SEMPRON 3000 socket 754 DIAGRAM SEMPRON Socket 754 AM2 31117 CMPXCHG16B
Text: BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh Processors Publication # 32559 Revision: 3.16 Issue Date: November 2009 2005-2009 Advanced Micro Devices, Inc. All rights reserved. The contents of this document are provided in connection with Advanced Micro Devices,
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