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    UNCORRECTABLE ERRORS FEC SOFT Search Results

    UNCORRECTABLE ERRORS FEC SOFT Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    GCJ31BR7LV223KW01K Murata Manufacturing Co Ltd Soft Termination Chip Multilayer Ceramic Capacitors for Automotive Visit Murata Manufacturing Co Ltd
    GCJ43DR7LV224KW01K Murata Manufacturing Co Ltd Soft Termination Chip Multilayer Ceramic Capacitors for Automotive Visit Murata Manufacturing Co Ltd
    GRJ43DR7LV224KW01K Murata Manufacturing Co Ltd Chip Multilayer Ceramic Capacitors with Soft Termination for General Purpose Visit Murata Manufacturing Co Ltd
    GCJ31BR7LV153KW01L Murata Manufacturing Co Ltd Soft Termination Chip Multilayer Ceramic Capacitors for Automotive Visit Murata Manufacturing Co Ltd
    GCJ32QR7LV683KW01L Murata Manufacturing Co Ltd Soft Termination Chip Multilayer Ceramic Capacitors for Automotive Visit Murata Manufacturing Co Ltd

    UNCORRECTABLE ERRORS FEC SOFT Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    ANRS01

    Abstract: Reed-Solomon CODEC Reed Solomon decoders with erasures 7 bit hamming code AHA4013 AHA4011 AHA4012 Reed-Solomon encoder algorithm
    Text: aha products group AHA Application Note Primer: Reed-Solomon Error Correction Codes ECC ANRS01_0404 Comtech EF Data Corporation 1126 Alturas Drive Moscow ID 83843 tel: 208.892.5600 fax: 208.892.5601 www.aha.com aha products group Table of Contents 1.0 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1


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    ANRS01 Reed-Solomon CODEC Reed Solomon decoders with erasures 7 bit hamming code AHA4013 AHA4011 AHA4012 Reed-Solomon encoder algorithm PDF

    OTU1

    Abstract: EP4S100G5H40I1N Reed-Solomon Decoder FPGA
    Text: G.709 FEC IP Core DS-1035 Data Sheet The Altera G.709 Forward Error Correction G.709 FEC IP core demonstrates the International Telecommunication Union-Telecommunication Standardization Sector (ITU-T) G.709 application of the Reed-Solomon (RS) algorithm in Optical Transport


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    DS-1035 OTU1 EP4S100G5H40I1N Reed-Solomon Decoder FPGA PDF

    G.975

    Abstract: BCH encoder decoder rs 1023 rs decoder OTU2 framer
    Text: G.975 I.4 EFEC IP Core DS-1036 Data Sheet The Altera G.975 I.4 Enhanced Forward Error Correction G.975 I.4 EFEC IP core demonstrates the International Telecommunication Union-Telecommunication Standardization Sector (ITU-T) G.975 standardized Reed-Solomon (RS) and BoseChaudhuri-Hocquenghem (BCH) super FEC algorithms. G.975 I.4 EFEC implements


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    DS-1036 G.975 BCH encoder decoder rs 1023 rs decoder OTU2 framer PDF

    microread

    Abstract: 64 QAM modulator demodulator HD49429F uncorrectable errors FEC soft 256qam HD49430F PQFP-100 equalizer algorithm multipath qam circuit CLK10M
    Text: HD49430F Preliminary Specification Rev. 2 April 1, 1998 General Description HD49430F is a highly integrated Downstream Processor optimized for applications such as Cable Modems and Set-top boxes and forms a complete and optimal solution with its companion HD49429F Upstream


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    HD49430F HD49430F HD49429F 100pin 100pf microread 64 QAM modulator demodulator uncorrectable errors FEC soft 256qam PQFP-100 equalizer algorithm multipath qam circuit CLK10M PDF

    HD4942

    Abstract: qam circuit
    Text: HD49430F Preliminary Specification HITACHI Rev. 2 April 1, 1998 General Description HD49430F is a highly integrated Downstream Processor optimized for applications such as Cable Modems and Set-top boxes and forms a complete and optimal solution with its companion HD49429F Upstream


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    HD49430F HD49430F HD49429F HD4942 qam circuit PDF

    Untitled

    Abstract: No abstract text available
    Text: HD49430F Preliminary Specification HITACHI Rev. 2 April 1, 1998 General Description HD49430F is a highly integrated Downstream Processor optimized for applications such as Cable Modems and Set-top boxes and forms a complete and optimal solution with its companion HD49429F Upstream


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    HD49430F HD49430F HD49429F 100pf PDF

    XIP2173

    Abstract: DCM-1 dcm11 error correction code in vhdl verilog implementation of error correcting code application of optical encoder Reed-Solomon Decoder verilog code XC2V500-5 CC345
    Text: G.709-Compliant FEC Core CC345 July 9, 2002 Product Specification AllianceCORE Facts Provided with Core Documentation User Guide, Design Guide EDIF netlist Design File Formats Constraints File cc345.ucf Testbench, test scripts Verification Tool Instantiation Templates


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    709-Compliant CC345) cc345 XIP2173 DCM-1 dcm11 error correction code in vhdl verilog implementation of error correcting code application of optical encoder Reed-Solomon Decoder verilog code XC2V500-5 PDF

    FEC Encoder

    Abstract: turbo fec
    Text: EFEC20 IP Core DS-1034-1.2 Data Sheet The Altera 20% Enhanced Forward Error Correction EFEC20 IP core includes a highperformance encoder and decoder for Optical Transport Network (OTN) FEC applications. Bose-Chaudhuri-Hocquenghem (BCH) streaming turbo product codes


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    EFEC20 DS-1034-1 EFEC20) FEC Encoder turbo fec PDF

    FEC Encoder

    Abstract: No abstract text available
    Text: EFEC7 IP Core DS-1033-1.2 Data Sheet The Altera 7% Enhanced Forward Error Correction EFEC7 IP core includes a highperformance encoder and decoder for Optical Transport Network (OTN) FEC applications. Bose-Chaudhuri-Hocquenghem (BCH) streaming turbo product codes


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    DS-1033-1 FEC Encoder PDF

    ETS-300-421

    Abstract: viterbi
    Text: FEC Decoder for Telecom Satellites the fact that power budget is becoming tighter and tighter; also, on the individual user side, the cost pressure and the technical constraints result into low power signal either emitted or received; so, in the whole chain, the signal to


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    DO-217

    Abstract: ADVANCED HARDWARE ARCHITECTURES Reed-Solomon encoder algorithm IESS-308 standard IESS-308 IESS 310 AHA4011 AHA4012 AHA4013 ANRS03
    Text: Advanced Hardware Architectures, Inc. PRODUCT BRIEF* AHA4013 12.5 MBYTES/SEC REED-SOLOMON ERROR CORRECTION DEVICE The A dvanced H ardw are A rchitectures’ A HA 4013 is a m em ber o f the A H A PerFEC high perform ance, single-chip R eed-Solom on Forw ard


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    AHA4013 PS4011 AHA4011 PS4012 AHA4012 ABRS06 DO-217 ADVANCED HARDWARE ARCHITECTURES Reed-Solomon encoder algorithm IESS-308 standard IESS-308 IESS 310 ANRS03 PDF

    Internal diagram of ic 7495

    Abstract: optical regenerator OTN SWITCH regenerator in optical 0936A TFEC0410G BA 1153 code of encoder and decoder in rs(255,239) sdh regenerator ic 7495 data sheet
    Text: Product Brief March 2001 TFEC0410G 40 Gbits/s Optical Networking Interface With Strong FEC and Digital Wrapper Features • ■ Versatile IC supports single 2488 Mbits/s 16 bits at 155 Mbits/s , quad 2488 Mbits/s (4 bits at 622 Mbits/s), and single 9952 Mbits/s (16 bits at


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    TFEC0410G STS-48/ STM-16 STS-192/STM-64 STS-48/STM-16 PB01-014SONT PN00-024SONT) Internal diagram of ic 7495 optical regenerator OTN SWITCH regenerator in optical 0936A BA 1153 code of encoder and decoder in rs(255,239) sdh regenerator ic 7495 data sheet PDF

    Untitled

    Abstract: No abstract text available
    Text: VSC6134 Datasheet Features ● ● ● ● ● ● ● ● ● ● Two ITU-T G.709-compliant processors GR253-compliant STS192 section and line processor OTU synchronous and asynchronous mapping 10 GbE transport with RMON MIB per IEEE 802.3 ITU-T G.975 Reed Solomon encoder and decoder


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    VSC6134 709-compliant GR253-compliant STS192 16-bit STS192/10 97-free 897-pin VMDS-10185 VSC6134 PDF

    aha Modem circuit diagram

    Abstract: IESS-308 iess 308 AHA4011C AHA4011C-040 AHA4012 AHA4013 DO-217 IESS-308 standard Reed-Solomon encoder algorithm
    Text: aha products group PRODUCT BRIEF* AHA4011C 10 MBYTES/SEC REED-SOLOMON ERROR CORRECTION DEVICE The AHA4011C is a member of the AHA PerFECTM high performance, single-chip ReedSolomon Forward Error Correction FEC devices. A single-phase clock synchronizes all chip


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    AHA4011C AHA4011C AHA4011C-040 PB4011c aha Modem circuit diagram IESS-308 iess 308 AHA4012 AHA4013 DO-217 IESS-308 standard Reed-Solomon encoder algorithm PDF

    "channel estimation"

    Abstract: No abstract text available
    Text: 5610 2k/8k COFDM Demodulator/FEC TDK SEMICONDUCTOR CORP. Advanced Information September 2001 FEATURES • • • • • • • • • • • • • • 2k/8k FFT processor ETS 300 744 compliant demodulator: Non-hierarchical QPSK, 16-QAM, 64-QAM Hierarchical 16-QAM, 64-QAM


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    VOLTA-48

    Abstract: S3485 OTU1 rubicon S3086 S19203 S19208 S3062 S3455 S3457
    Text: ADVANCE Product Brief RUBICON-48 OC-48/12/3 DW/FEC/PM and ASYNC Mapper Device with Strong FEC FEATURES Part Number S4815PBI, Revision 1.2, September 2003 Industry Standard RS 255,239 Forward Error Correction with 6.2 dB Coding Gain (at 10-15 CER) Software compatible with industry leading AMCC


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    RUBICON-48 OC-48/12/3 S4815PBI, S19203 S19208 Rubicon-48 S3062. S3062 S3485 Volta-48 VOLTA-48 OTU1 rubicon S3086 S19203 S19208 S3455 S3457 PDF

    VOLTA-48

    Abstract: S19203 rubicon OTU1 amcc volta S4815PBI S19208 S3062 S3086 S3455
    Text: RUBICON-48 Product Brief OC-48/12/3 DW/FEC/PM and ASYNC Mapper Device with Strong FEC FEATURES Part Number S4815PBI, Revision 2.2, May 2006 Industry Standard RS 255,239 Forward Error Correction with 6.2 dB Coding Gain (at 10-15 CER) Easy software migration from industry leading AMCC


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    RUBICON-48 OC-48/12/3 S4815PBI, S19203 S19208 Rubicon-48 S3062. S3062 VOLTA-48 S19203 rubicon OTU1 amcc volta S4815PBI S19208 S3086 S3455 PDF

    mt352 design manual

    Abstract: ZLAN-125 viterbi algorithm DVB-T Demodulator
    Text: MT352 Design Manual Part Number: MT352 Revision Number: 1.3 Issue Date: August 2004 MT352 Design Manual Table of Contents 1.0 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7


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    MT352 MT352 mt352 design manual ZLAN-125 viterbi algorithm DVB-T Demodulator PDF

    AHA4010

    Abstract: PS4011 ANRS01 PJ 969 8F AHA4011 ANRS02 IESS-308 CRTN Reed-Solomon Decoder test vector 3c46
    Text: ADVANCED Product Specification AHA4011 10 MBytes/sec Reed-Solomon Error Correction Device Advanced Hardware Architectures, Inc. P.O. Box 9669 Moscow, Idaho 83843 208.883.8000 FAX 208.883.8001 BBS 208.883.8002 Advanced Hardware architectures The Data Coding Leader


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    AHA4011 PS4011-0793 AHA4011 IESS/308 78E-06 95E-06 12E-06 45E-06 15E-05 AHA4010 PS4011 ANRS01 PJ 969 8F ANRS02 IESS-308 CRTN Reed-Solomon Decoder test vector 3c46 PDF

    Untitled

    Abstract: No abstract text available
    Text: PS20250 Dual COFDM demodulator with PID filters Data Sheet 1 Data Sheet 292108 issue 1 System Ordering Information 1.1 Features • • • • • • • • • • • • PS20250C1L1A5 80 Pin LQFP* Trays *Pb Free Matte Tin Dual Channel DVB-T Demodulator optimised for:


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    PS20250 PS20250C1L1A5 PDF

    MT351

    Abstract: Tuner dvb-t I2C program convolutional decoder DVB-T 17x6
    Text: MT351 Terrestrial Channel Demodulator Advance Datasheet The MT351 is a single-chip Coded Orthogonal Frequency Division Multiplex COFDM demodulator designed specifically for the DVB-T market. It can be used in either 2K or 8K carrier modes and its Forward Error Correction (FEC), which includes a


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    MT351 MT351 10-bit Tuner dvb-t I2C program convolutional decoder DVB-T 17x6 PDF

    PB55

    Abstract: MT351 transmission "pilot symbols" data symbol sequence
    Text: MT351 Terrestrial Channel Decoder Product Information The MT351 is a single-chip Coded Orthogonal Frequency Division Multiplex COFDM demodulator designed specifically for the DVB-T market. It can be used in either 2K or 8K carrier modes and its Forward Error Correction (FEC), which includes a


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    MT351 MT351 10-bit PB55 transmission "pilot symbols" data symbol sequence PDF

    MCT2100

    Abstract: 160QFP DSP56362 MCT4000 MPC850 8vsb CGND22 UA727
    Text: Order Number: MCT2100AI/D Rev. 1.1, 3/8/2000 Semiconductor Products Sector Advance Information MCT2100 MCT2100 ATSC 8-VSB Demodulator / Forward Error Correction for Digital Terrestrial Television The MCT2100 is an all-digital single-chip solution for HDTV receiver systems. The MCT2100 performs 8-VSB demodulation and error correction pursuant with ATSC Specification A/53. It operates with a 50 MHz clock and accepts 25 MHz samples of 8-VSB modulated signal at a direct tuner IF of 43.75 MHz, or at a downcoverted IF input


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    MCT2100AI/D MCT2100 MCT2100 160QFP DSP56362 MCT4000 MPC850 8vsb CGND22 UA727 PDF

    Untitled

    Abstract: No abstract text available
    Text: CE6251 – Dual COFDM demodulator with PID filters and MRC diversity Data Sheet April 19, 2007 Revision 0,5 Subject to change without notice Document number: D79559-005 Legal Statements INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE,


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    CE6251 D79559-005 CE6251 PDF