Untitled
Abstract: No abstract text available
Text: TXC06125ACPL/B Linear ICs Dedicated/Special Application Linear Circuit statusû Military/High-RelY P D Max. (W)800m Nom. Supp (V)5.0 Minimum Operating Temp (øC)0 Maximum Operating Temp (øC)70 Package StyleQCC-J Mounting StyleS Pinout Equivalence Code44-185
|
Original
|
TXC06125ACPL/B
Code44-185
Pins44
NumberLN04400185
25ACPL/B
|
PDF
|
Untitled
Abstract: No abstract text available
Text: TXC06125ACPL Linear ICs Dedicated/Special Application Linear Circuit statusû Military/High-RelN P D Max. (W)800m Nom. Supp (V)5.0 Minimum Operating Temp (øC)0 Maximum Operating Temp (øC)70 Package StyleQCC-J Mounting StyleS Pinout Equivalence Code44-185
|
Original
|
TXC06125ACPL
Code44-185
Pins44
NumberLN04400185
C06125ACPL
|
PDF
|
TranSwitch Corporation
Abstract: B2M1-5
Text: PHAST-1 Device SONET STS-1 Overhead Terminator TXC-06101 DATA SHEET • Provides SONET interface to any type of payload • Programmable STS-1 or STS-N modes • Receive bit-serial STS-1 signal input to the Line Side using external reference frame pulse for
|
Original
|
TXC-06101
TXC-06101-MB
TranSwitch Corporation
B2M1-5
|
PDF
|
DF2-A
Abstract: XB2H DF2E
Text: TL3M Device Triple Level 3 Mapper TXC-03453 DESCRIPTION • Maps up to three independent DS3/E3 line formats into SDH/SONET formats as follows: - DS3 to/from STM-1/TUG-3 - DS3 to/from STS-3/STS-1 - E3 to/from STM-1/TUG-3 • SDH/SONET bus access: - Byte wide drop and add buses
|
Original
|
TXC-03453
TXC-03453-MB
DF2-A
XB2H
DF2E
|
PDF
|
Untitled
Abstract: No abstract text available
Text: TL3M Device Triple Level 3 Mapper TXC-03453 DESCRIPTION • Maps up to three independent DS3/E3 line formats into SDH/SONET formats as follows: - DS3 to/from STM-1/TUG-3 - DS3 to/from STS-3/STS-1 - E3 to/from STM-1/TUG-3 • SDH/SONET bus access: - Byte-wide drop and add buses
|
Original
|
TXC-03453
TXC-03453-MA
|
PDF
|
TUG-3
Abstract: vc-4 digital cross connect
Text: TL3M Device Triple Level 3 Mapper TXC-03453B TECHNICAL OVERVIEW Each of the three channels of the TL3M can map a DS3 line signal into an STM-1 TUG-3 or STS-3 STS-1 SPE SDH/SONET signal. An E3 signal can be mapped only into an STM-1 TUG-3. The TL3M interfaces to an STM-1 or STS-3 SDH/SONET signal
|
Original
|
TXC-03453B
TXC-03453B-MA
TUG-3
vc-4 digital cross connect
|
PDF
|
Untitled
Abstract: No abstract text available
Text: TL3M Device Triple Level 3 Mapper TXC-03453 TECHNICAL OVERVIEW SDH/SONET SIDE TELECOM BUS O-Bit Interfaces • Add/drop multiplexers • Digital cross connect systems • Broadband switching systems • Transmission equipment External Alarm Interfaces Drop Bus
|
Original
|
TXC-03453
TXC-03453-MA
|
PDF
|
Untitled
Abstract: No abstract text available
Text: TL3M Device Triple Level 3 Mapper TXC-03453 PRODUCT INFORMATION DESCRIPTION • Maps up to three independent DS3/E3 line formats into SDH/ SONET formats as follows: - DS3 to/from STM-1/TUG-3 - DS3 to/from STS-3/STS-1 - E3 to/from STM-1/TUG-3 • SDH/SONET bus access:
|
Original
|
TXC-03453
TXC-03453-MC
|
PDF
|
TSF 1303
Abstract: MAC-07
Text: EtherMap -3 Device Ethernet into STS-3/STM-1 SONET/SDH Mapper TXC-04226 DATA SHEET PRODUCT PREVIEW TELECOM BUS SIDE +1.8V +3.3V HO/LO RING Ports APPLICATIONS • • • • • HO/LO POH Ports SONET/SDH add/drop and terminal multiplexers Multi-service access platforms
|
Original
|
TXC-04226
TXC-04226-MB
TSF 1303
MAC-07
|
PDF
|
n117
Abstract: No abstract text available
Text: DS3F Device DS3 Framer TXC-03401B DATA SHEET • DS3 payload access, bit-serial or nibble-parallel • C-bit parity or M13 operating mode • C-bit interface 13 C-bits in, 14 out • Detect and generate DS3 AIS, and idle signals • Transmit reference generator for serial operation
|
Original
|
TXC-03401B
TXC-03401B-MB
n117
|
PDF
|
TXC-06101AILQ
Abstract: TAIS SOT GR-253-CORE TXC-06101 GR-1400-CORE 1C11C
Text: PHAST-1 Device SONET STS-1 Overhead Terminator TXC-06101 DATA SHEET • Provides SONET interface to any type of payload • Programmable STS-1 or STS-N modes • Receive bit-serial STS-1 signal input to the Line Side using external reference frame pulse for
|
Original
|
TXC-06101
TXC-06101-MB
TXC-06101AILQ
TAIS SOT
GR-253-CORE
TXC-06101
GR-1400-CORE
1C11C
|
PDF
|
GR-253-CORE
Abstract: GR-499-CORE MT8980 ROB-1998 e1 E2 e3 liu transceiver NPRM
Text: T1Fx8 Device 8-Channel T1 Framer TXC-03108 TECHNICAL OVERVIEW FEATURES DESCRIPTION • D4 SF, ESF including HDLC Link support , auto search, and independent transparent framing modes • Encodes/decodes AMI/B8ZS and forced ones density line codes • Fractional T1; Gapped clock or marker; Auxiliary
|
Original
|
TXC-03108
TXC-03108-MA
GR-253-CORE
GR-499-CORE
MT8980
ROB-1998
e1 E2 e3 liu transceiver
NPRM
|
PDF
|
Wavetek model 166
Abstract: MOTHERBOARD CIRCUIT diagram explained hp3784A txc-02020-aipl Wavetek 187 JESD22-A112-A TXC20153G TXC-20153-MB PC MOTHERBOARD oi CIRCUIT diagram
Text: DS3LIM-SN DS3/STS-1 Line Interface Module NRZ Clock/Data Output TXC-20153D, TXC-20153G DATA SHEET DESCRIPTION FEATURES • Complete B3ZS analog to NRZ digital DS3/ STS-1 line interface unit in a compact 2.6 square inch, 50-pin DIP Module • Single +5V power supply
|
Original
|
TXC-20153D,
TXC-20153G
50-pin
TXC-20153-MB
Wavetek model 166
MOTHERBOARD CIRCUIT diagram explained
hp3784A
txc-02020-aipl
Wavetek 187
JESD22-A112-A
TXC20153G
TXC-20153-MB
PC MOTHERBOARD oi CIRCUIT diagram
|
PDF
|
TXC-21055
Abstract: JESD22-A112-A PE65966 HDB3 coding
Text: E3RT Device 34 Mbit/s E3 Line Interface TXC-02053 DATA SHEET FEATURES DESCRIPTION • 34368 kbit/s line interface The TranSwitch 34 Mbit/s E3 Receiver/Transmitter Line Interface E3RT is a Bi-CMOS VLSI device that provides the functions needed for terminating the ITU-T
|
Original
|
TXC-02053
TXC-02053-MB
TXC-21055
JESD22-A112-A
PE65966
HDB3 coding
|
PDF
|
|
|
LMI 458
Abstract: ic 321 ENC2COUNT tele 539 PE-MCXMAC 85z3 trxcom 8XC196KD transistor m1511 MAC5 circuit
Text: EtherMap -3 Device Ethernet into STS-3/STM-1 SONET/SDH Mapper TXC-04226 DATA SHEET PRODUCT PREVIEW • Supports up to eight 10/100 Mbit/s Ethernet ports, each using a SMII interface • Supports a single 1000 Mbit/s Ethernet port, using a parallel GMII interface lead shared with SMII interfaces
|
Original
|
TXC-04226
LMI 458
ic 321
ENC2COUNT
tele 539
PE-MCXMAC
85z3
trxcom
8XC196KD
transistor m1511
MAC5 circuit
|
PDF
|
734A coaxial cable
Abstract: 68 pin plcc socket view bottom D-C73C ebe switches TAIS SOT TXC-02021 step down transformer TR499
Text: AR T Devices Advanced STS-1/DS3 Receiver/Transmitter ART: TXC-02020 44-Pin ARTE: TXC-02021 (68-Pin) DATA SHEET Product Preview FEATURES : ^ = = = = = = = = ^ DESCRIPTION • Single chip line interface for DS3 and STS-1 " = The Advanced DS3/STS-1 Receiver/Transmitter (ART)
|
OCR Scan
|
44-pin
68-pin
TXC-02020
44-Pin)
TXC-02021
68-Pin)
734A coaxial cable
68 pin plcc socket view bottom
D-C73C
ebe switches
TAIS SOT
TXC-02021
step down transformer
TR499
|
PDF
|
734A coaxial cable
Abstract: No abstract text available
Text: ART Devices t * a n S w i t c h X- Advanced DS3/STS-1 Receiver/Transmitter ART: TXC-02020 44-Pin ARTE: TXC-02021 (68-Pin) DATA SHEET DESCRIPTION FEATURES Single device line interface for DS3 and STS-1 Meets ANSI Standard T1.102-1993 Meets ‘crossconnect frame’ mask requirements
|
OCR Scan
|
TXC-02020
44-Pin)
TXC-02021
68-Pin)
TXC-02020-MB
734A coaxial cable
|
PDF
|
I7 motherboard circuit diagram
Abstract: MOTHERBOARD CIRCUIT diagram explained
Text: t h a n S w it c h # DS3LIM-SN DS3/STS-1 Line Interface Module NRZ Clock/Data Output TXC-20153D, TXC-20153G X- DATA SHEET DESCRIPTION FEATURES • Complete B3ZS analog to NRZ digital DS3/ STS-1 line interface unit in a compact 2.6 square inch, 50-pin DIP Module
|
OCR Scan
|
50-pin
TXC-20153D
TXC-20153G
TXC-20153-MB
I7 motherboard circuit diagram
MOTHERBOARD CIRCUIT diagram explained
|
PDF
|
1j63
Abstract: .1J63 7062l
Text: f QE1F-PIus Device f t r H Quad E1 Framer-Plus TXC-03114 DATA SHEET DESCRIPTION The QE1F-Plus is a four-channel E1 2048 kbit/s framer designed for voice and data communications applications. A dual unipolar or NRZ line interface is supported with full alarm detection and generation per
|
OCR Scan
|
TXC-03114
TXC-03114-MB
1j63
.1J63
7062l
|
PDF
|
Untitled
Abstract: No abstract text available
Text: L3M Device Level 3 Mapper TXC-03452B DATASHEET FEATURES DESCRIPTION = The L3M maps a DS3 line signal into an STM-1 TUG-3 or STS-3/STS-1 SPE or STS-1 SPE SDH/SONET sig nal. An E3 line signal is mapped into an STM-1 TUG-3 signal only. The L3M provides a TUG-3 formatted signal
|
OCR Scan
|
TXC-03452B
TXC-03452B-M
|
PDF
|
Untitled
Abstract: No abstract text available
Text: tmän S w it c h „ DS1MX7 Device DS1 Mapper 7-Channel TXC-04201B x- DATA SHEET DESCRIPTION FEATURES • Seven independent 1.544 Mbit/s DS1 mappers • Single byte-parallel Telecom Bus @ 6.48 MHz 28 Slots or 19.44 MHz (84 Slots) • Floating V T1.5 Byte Synchronous mapping for
|
OCR Scan
|
TXC-04201B
TU-11
5/TU-11
TXC-04201
|
PDF
|
Untitled
Abstract: No abstract text available
Text: ART Devices ~>T~ z a o a Advanced DS3/STS-1 Receiver/Transmitter ART: TXC-02020 44-Pln ARTE: TXC-02021 (68-Pin) w DATA SHEET Preliminary maaa .= • Single device line interface for DS3 and STS-1 • Single +5V power supply • Meets ‘crossconnect frame’ mask requirements
|
OCR Scan
|
TXC-02020
44-Pln)
TXC-02021
68-Pin)
TXC-02020-MB
|
PDF
|
Untitled
Abstract: No abstract text available
Text: E2/E3F Device 8-, 34-Mbit/s Framer TXC-03701B DATA SHEET FEATURES DESCRIPTION • Framer for ITU-TSS Recommendations: - G.742 8448 kbit/s - G.745 (8448 kbit/s) - G.751 (34368 kbit/s) - G.753 (34368 kbit/s) The E2/E3 Framer (E2/E3F) is a CMOS VLSI device
|
OCR Scan
|
34-Mbit/s
TXC-03701B
TXC-03701
|
PDF
|
Untitled
Abstract: No abstract text available
Text: tm ä n S w it c h x- E123MUX Device s E1/E2/E3 MUX/DEMUX TXC-03361 DATA SHEET FEATURES DESCRIPTION ^ • • E1 2048 kbit/s multiplexer/demultiplexer for ITU-T Recommendations: G.742 (8448 kbit/s E2 frame format) G.751 (34368 kbit/s E3 frame format)
|
OCR Scan
|
E123MUX
TXC-03361
E12/E23
TXC-03361-MB
|
PDF
|
