HLT28
Abstract: HT28 KLT28 KT28 MC100ELT28 MC10ELT28 MC10ELT28D
Text: MC10ELT28, MC100ELT28 5 V TTL to Differential PECL and Differential PECL to TTL Translator Description • • • • • • • • • • 3.5 ns Typical PECL to TTL Propagation Delay 1.2 ns Typical TTL to PECL Propagation Delay PNP TTL Inputs for Minimal Loading
|
Original
|
MC10ELT28,
MC100ELT28
HLT28
KLT28
MC10ELT28/D
HLT28
HT28
KLT28
KT28
MC100ELT28
MC10ELT28
MC10ELT28D
|
PDF
|
HLT28
Abstract: KLT28 MC100 MC100ELT28 MC10ELT28 transistor k 4110
Text: MC10ELT28, MC100ELT28 5 V TTL to Differential PECL and Differential PECL to TTL Translator Description • • • • • • • • • • 3.5 ns Typical PECL to TTL Propagation Delay 1.2 ns Typical TTL to PECL Propagation Delay PNP TTL Inputs for Minimal Loading
|
Original
|
MC10ELT28,
MC100ELT28
HLT28
KLT28
MC10ELT28/D
HLT28
KLT28
MC100
MC100ELT28
MC10ELT28
transistor k 4110
|
PDF
|
HLT28
Abstract: HT28 KLT28 KT28 MC100ELT28 MC10ELT28
Text: MC10ELT28, MC100ELT28 5 V TTL to Differential PECL and Differential PECL to TTL Translator Description • • • • • • • • • • 3.5 ns Typical PECL to TTL Propagation Delay 1.2 ns Typical TTL to PECL Propagation Delay PNP TTL Inputs for Minimal Loading
|
Original
|
MC10ELT28,
MC100ELT28
HLT28
KLT28
MC10ELT28/D
HLT28
HT28
KLT28
KT28
MC100ELT28
MC10ELT28
|
PDF
|
Untitled
Abstract: No abstract text available
Text: MC10ELT28, MC100ELT28 5 V TTL to Differential PECL and Differential PECL to TTL Translator Description • • • • • • • • • • 3.5 ns Typical PECL to TTL Propagation Delay 1.2 ns Typical TTL to PECL Propagation Delay PNP TTL Inputs for Minimal Loading
|
Original
|
MC10ELT28,
MC100ELT28
HLT28
KLT28
MC10ELT28/D
|
PDF
|
FT232R
Abstract: FT232RQ TTL232R-3V3 ft232r MAX232 MAX232 TTL232R TTL-232R TTL-232R-3V3 UART TTL buffer serial port to ttl using max232
Text: Future Technology Devices International Ltd. TTL-232R USB to TTL Serial Converter Cable The TTL-232R is a USB to TTL serial converter cable incorporating FTDI’s FT232RQ USB - Serial UART interface IC device, the latest device to be added to FTDI’s range of USB UART interface Integrated Circuit Devices. It is designed
|
Original
|
TTL-232R
TTL-232R
FT232RQ
FT232R
TTL232R-3V3
ft232r MAX232
MAX232
TTL232R
TTL-232R-3V3
UART TTL buffer
serial port to ttl using max232
|
PDF
|
max232 rts cts
Abstract: TTL-232R-3V3 cmos 3v3 TTL232R-3V3 FT232RQ FT232R USB UART ttl drive USB CABLE MAX232 for level converter notes on serial communication MAX232
Text: Future Technology Devices International Ltd. TTL-232R-3V3 USB to TTL Serial Converter Cable The TTL-232R-3V3 is a USB to TTL serial converter cable incorporating FTDI’s FT232RQ USB - Serial UART interface IC device, the latest device to be added to FTDI’s range of USB UART interface Integrated Circuit Devices. It
|
Original
|
TTL-232R-3V3
TTL-232R-3V3
FT232RQ
FT232R
max232 rts cts
cmos 3v3
TTL232R-3V3
FT232R USB UART
ttl drive
USB CABLE
MAX232 for level converter
notes on serial communication MAX232
|
PDF
|
MC10H605-D
Abstract: MC100H605 MC10H605 MC10H605FN
Text: MC10H605, MC100H605 Registered Hex ECL to TTL Translator Description The MC10/100H605 is a 6−bit, registered, dual supply ECL to TTL translator. The device features differential ECL inputs for both data and clock. The TTL outputs feature balanced 24 mA sink/source
|
Original
|
MC10H605,
MC100H605
MC10/100H605
MC10H605/D
MC10H605-D
MC100H605
MC10H605
MC10H605FN
|
PDF
|
k 3555
Abstract: H607 MC100H607 MC10H607 MC10H607FN
Text: MC10H607, MC100H607 Registered Hex PECL to TTL Translator Description The MC10H/100H607 is a 6−bit, registered PECL to TTL translator. The device features differential PECL inputs for both data and clock. The TTL outputs feature 48 mA sink, 24 mA source drive
|
Original
|
MC10H607,
MC100H607
MC10H/100H607
10HTM
MC10H607/D
k 3555
H607
MC100H607
MC10H607
MC10H607FN
|
PDF
|
MC100H605
Abstract: MC10H605 MC10H605FN
Text: MC10H605, MC100H605 Registered Hex ECL to TTL Translator Description The MC10/100H605 is a 6−bit, registered, dual supply ECL to TTL translator. The device features differential ECL inputs for both data and clock. The TTL outputs feature balanced 24 mA sink/source
|
Original
|
MC10H605,
MC100H605
MC10/100H605
MC10H605/D
MC100H605
MC10H605
MC10H605FN
|
PDF
|
MC100H605
Abstract: MC10H605 MC10H605FN SOCKET PLCC28
Text: MC10H605, MC100H605 Registered Hex ECL to TTL Translator Description The MC10/100H605 is a 6−bit, registered, dual supply ECL to TTL translator. The device features differential ECL inputs for both data and clock. The TTL outputs feature balanced 24 mA sink/source
|
Original
|
MC10H605,
MC100H605
MC10/100H605
MC10H605/D
MC100H605
MC10H605
MC10H605FN
SOCKET PLCC28
|
PDF
|
Untitled
Abstract: No abstract text available
Text: MC10H607, MC100H607 Registered Hex PECL to TTL Translator Description The MC10H/100H607 is a 6−bit, registered PECL to TTL translator. The device features differential PECL inputs for both data and clock. The TTL outputs feature 48 mA sink, 24 mA source drive
|
Original
|
MC10H607,
MC100H607
MC10H/100H607
MC10H607/D
|
PDF
|
Untitled
Abstract: No abstract text available
Text: MC10H605, MC100H605 Registered Hex ECL to TTL Translator Description The MC10/100H605 is a 6−bit, registered, dual supply ECL to TTL translator. The device features differential ECL inputs for both data and clock. The TTL outputs feature balanced 24 mA sink/source
|
Original
|
MC10H605,
MC100H605
MC10/100H605
MC10H605/D
|
PDF
|
marking code diode wl
Abstract: motorola ECL k 3555 PLCC-28 H607 MC100H607 MC10H607 MC10H607FN
Text: MC10H607, MC100H607 Registered Hex PECL to TTL Translator Description The MC10H/100H607 is a 6−bit, registered PECL to TTL translator. The device features differential PECL inputs for both data and clock. The TTL outputs feature 48 mA sink, 24 mA source drive
|
Original
|
MC10H607,
MC100H607
MC10H/100H607
10HTM
MC10H607/D
marking code diode wl
motorola ECL
k 3555
PLCC-28
H607
MC100H607
MC10H607
MC10H607FN
|
PDF
|
H604
Abstract: MC100H604 MC10H604 MC10H604FN
Text: MC10H604, MC100H604 Registered Hex TTL to ECL Translator Description The MC10H/100H604 is a 6−bit, registered, dual supply TTL to ECL translator. The device features differential ECL outputs as well as a choice between either a differential ECL clock input or a TTL clock
|
Original
|
MC10H604,
MC100H604
MC10H/100H604
MC10H604/D
H604
MC100H604
MC10H604
MC10H604FN
|
PDF
|
|
|
Untitled
Abstract: No abstract text available
Text: MC10H604, MC100H604 Registered Hex TTL to ECL Translator Description The MC10H/100H604 is a 6−bit, registered, dual supply TTL to ECL translator. The device features differential ECL outputs as well as a choice between either a differential ECL clock input or a TTL clock
|
Original
|
MC10H604,
MC100H604
MC10H/100H604
MC10H604/D
|
PDF
|
PLCC-28
Abstract: H604 MC100H604 MC10H604 MC10H604FN
Text: MC10H604, MC100H604 Registered Hex TTL to ECL Translator Description The MC10H/100H604 is a 6−bit, registered, dual supply TTL to ECL translator. The device features differential ECL outputs as well as a choice between either a differential ECL clock input or a TTL clock
|
Original
|
MC10H604,
MC100H604
MC10H/100H604
MC10H604/D
PLCC-28
H604
MC100H604
MC10H604
MC10H604FN
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Processor Interface Components—QSpan User Manual 4 Signals and DC Characteristics 4.1 Terminology The abbreviations used in this chapter are defined below. Two-state output Tristate output Bidirectional Input Output Open Drain Input with TTL threshold TTL Schmitt trigger input
|
OCR Scan
|
A117I
208-Pin
|
PDF
|
NEC C51A
Abstract: nec inverter schematic F074 marking B007 marking B003 JH-04 UPB6101C
Text: N É C ELECTRONICS INC 7H c D e | LiMH752S DD0Û110 1 NEC NEC Electronics Inc. T-.42-11-05 //PB 6100 TTL-2 SERIES BIPOLAR TTL GATE ARRAYS March 1985 Revision 1 Description The //PB6100 series features three high-speed, lowpower, TTL-compatible gate arrays using advanced
|
OCR Scan
|
iMH752S
uPB6100
uPB6101
uPB6102
uPB6103
b457S55
/PB610
//PB6100
AIPB6101
AiPB6102
NEC C51A
nec inverter schematic
F074
marking B007
marking B003
JH-04
UPB6101C
|
PDF
|
JESD22-A114-A
Abstract: JESD78
Text: NLU1GT50 Single Buffer, Non-Inverting, TTL Level TTL-Compatible Inputs The NLU1GT50 MiniGatet is an advanced CMOS high-speed non-inverting buffer in ultra-small footprint. The device input is compatible with TTL-type input thresholds and the output has a full 5.0 V CMOS level output swing.
|
Original
|
NLU1GT50
NLU1GT50
517AA
613AD
613AE
613AF
NLU1GT50/D
JESD22-A114-A
JESD78
|
PDF
|
Untitled
Abstract: No abstract text available
Text: NLU1GT50 Single Buffer, Non-Inverting, TTL Level TTL−Compatible Inputs The NLU1GT50 MiniGatet is an advanced CMOS high−speed non−inverting buffer in ultra−small footprint. The device input is compatible with TTL−type input thresholds and the output has a full 5.0 V CMOS level output swing.
|
Original
|
NLU1GT50
NLU1GT50
613AD
613AE
613AF
517BX
517AQ
NLU1GT50/D
|
PDF
|
MC100H680
Abstract: MC10H680 T101
Text: MC10H680, MC100H680 4−Bit Differential ECL Bus to TTL Bus Transceiver Description The MC10H/100H680 is a dual supply 4−bit differential ECL bus to TTL bus transceiver. It is designed to allow the system designer to no longer be limited in bus speed associated with standard TTL busses.
|
Original
|
MC10H680,
MC100H680
MC10H/100H680
MC10H680/D
MC100H680
MC10H680
T101
|
PDF
|
ttl 7709
Abstract: MC100H680 MC10H680 T101
Text: MC10H680, MC100H680 4−Bit Differential ECL Bus to TTL Bus Transceiver Description The MC10H/100H680 is a dual supply 4−bit differential ECL bus to TTL bus transceiver. It is designed to allow the system designer to no longer be limited in bus speed associated with standard TTL busses.
|
Original
|
MC10H680,
MC100H680
MC10H/100H680
MC10H680/D
ttl 7709
MC100H680
MC10H680
T101
|
PDF
|
Untitled
Abstract: No abstract text available
Text: NLU1GT50 Single Buffer, Non-Inverting, TTL Level TTL−Compatible Inputs The NLU1GT50 MiniGatet is an advanced CMOS high−speed non−inverting buffer in ultra−small footprint. The device input is compatible with TTL−type input thresholds and the output has a full 5.0 V CMOS level output swing.
|
Original
|
NLU1GT50
517AA
NLU1GT50/D
|
PDF
|
Untitled
Abstract: No abstract text available
Text: NLU1GT50 Single Buffer, Non-Inverting, TTL Level TTL−Compatible Inputs The NLU1GT50 MiniGatet is an advanced CMOS high−speed non−inverting buffer in ultra−small footprint. The device input is compatible with TTL−type input thresholds and the output has a full 5.0 V CMOS level output swing.
|
Original
|
NLU1GT50
517AA
NLU1GT50/D
|
PDF
|
