TT4175T Search Results

Untitled

Abstract: No abstract text available
Text: XC9536 In-System Programmable CPLD K X I L I N X June 1, 1996 Version 1.0 Preliminary Product Specification Features Power Management • • 5 ns pin-to-pin logic delays on all pins fQisiy to 125 MHz • • • 36 macrocells with 800 usable gates Up to 34 user I/O pins