TSMC 180NM Search Results

TSMC 180NM Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
180NM cmos process parameters Abstract: tsmc eeprom TSMC Flash 40nm TSMC 90nm flash Text: Contact Kilopass For More Information NVM IP. Boundless Freedom to Embed e-mail: info@kilopass.com www.kilopass.com Applications LOGIC CMOS EMBEDDED FTP NVM IN 40NM AT TSMC, GLOBALFOUNDRIES, AND UMC Product Overview General Description Itera is the industry’s irst logic CMOS	Original	con56 KMTX40LP2K-R32W32-2K512 KMTX40LP4K-R32W32-4K128 KMTX40LP4K-R32W32-4K256 KMTX40LP4K-R32W32-4K511 KMTX40LP8K-R32W32-8K128 KMTX40LP8K-R32W32-4K510 KMTX40LP16K-R32W32-4K508 KMTX40LP32K-R32W32-4K502 KMTX40LP64K-R32W32-4K480 180NM cmos process parameters tsmc eeprom TSMC Flash 40nm TSMC 90nm flash	PDF
chn 723 Abstract: TSMC 180nm dual port sram chn 448 CHN 727 chn 501 chn 711 CHN 450 TSMC 180nm single port sram tsmc 180nm sram TSMC 180nm Text: CS4100 TM ADPCM Speech Coders Virtual Components for the Converging World The CS4100 family of adaptive differential pulse code modulators ADPCMs is designed to provide high performance solutions for a broad range of applications requiring speech compression and decompression.	Original	CS4100 CS4100 DS4100 chn 723 TSMC 180nm dual port sram chn 448 CHN 727 chn 501 chn 711 CHN 450 TSMC 180nm single port sram tsmc 180nm sram TSMC 180nm	PDF
TSMC 180nm Abstract: ofdm modulator CS3820TK 180NM CS3820 ofdm demodulator ofdm transmitter modulator OFDM Viterbi Decoder interleaver Text: CS3820 802.11a Baseband Core Product Brief TM Virtual Components for the Converging World The CS3820 WLAN baseband core is designed to provide a high performance, low power physical layer solution fully compatible with the IEEE802.11a standard. This application specific silicon core achieves high performance	Original	CS3820 CS3820 IEEE802 PB3820 TSMC 180nm ofdm modulator CS3820TK 180NM ofdm demodulator ofdm transmitter modulator OFDM Viterbi Decoder interleaver	PDF
TSMC 180nm dual port sram Abstract: TSMC 90nm sram tsmc 180nm sram voltage regulator I2C 10GBASE-T TSMC 90nm flash energy consumption in DVS TN1010 120C ARM926EJ-S Text: PowerWise Adaptive Voltage Scaling AVS Technology Webinar Rick Zarr, PowerWise® Technologist Joy Taylor, Marketing Manager Feb 25, 2009 Webinar Objectives • Review power consumption of digital subsystems in various applications • Discuss PowerWise® Adaptive Voltage Scaling (AVS)	Original		PDF
TSMC cmos 0.18um Abstract: TSMC 0.18um SRAM TSMC 180nm single port sram TSMC 180nm dual port sram TSMC 0.18Um tsmc 180nm sram 2 port register file SC18 180-nm TSMC 180nm Text: AMI Semiconductor SC18 0.18µm CMOS Standard Cell SC18 0.18µm CMOS Standard Cell Feature Sheet Key Features • Excellent performance: • 5.6ns delay for an 18 x 18 multiplier • Junction temperature range -40°C to 125°C • AMIS 180nm ASICs provide the optimal combination of	Original	180nm 200-300MHz 30nW/MHz/gate CL018G PCI33, PCI66, PCIX-183 M-20620-001 TSMC cmos 0.18um TSMC 0.18um SRAM TSMC 180nm single port sram TSMC 180nm dual port sram TSMC 0.18Um tsmc 180nm sram 2 port register file SC18 180-nm TSMC 180nm	PDF
TSMC Flash 40nm Abstract: TSMC 40nm SRAM TSMC IO image signal processor Text: Kilopass Product Brief TM Gusto High-Density Memory INDUSTRY’S FIRST AND ONLY 4MB LOGIC NON-VOLATILE MEMORY IP 1.1 General Description With 4x the capacity of the previous largest embedded non-volatile memory NVM IP, Gusto can store and safeguard firmware code critical to vertical system-on-chip (SoC) applications – code that delivers vital differentiating functionality. Gusto allows SoC developers to integrate significantly more software functionality into	Original		PDF
adpcm Abstract: G716 CS4590 Text: CS4590 TM High Channel Count ADPCM Speech Coder Preliminary Datasheet Virtual Components for the Converging World The CS4590 Adaptive Differential Pulse Code Modulator ADPCM core is designed to provide high performance solutions for a broad range of applications requiring high channel count speech compression and	Original	CS4590 CS4590 DS4590 adpcm G716	PDF
verilog code for twiddle factor radix 2 butterfly Abstract: FFT CODING BY VERILOG FOR 8 POINT WITH RADIX 2 VHDL code for radix-2 fft vhdl code for FFT 32 point vhdl code for 16 point radix 2 FFT verilog code radix 4 multiplication sdc 603 vhdl code for FFT 4096 point FFT CODING BY VERILOG FOR 4 POINT WITH RADIX 2 vhdl code for radix-4 fft Text: CS2420 TM 2048/4096/8192 Point FFT/IFFT Virtual Components for the Converging World The CS2420 is an online programmable 2048 - 8192-point FFT/IFFT core. It is based on the radix-4 algorithm and performs 2048-point to 8192-point FFT/IFFT computation in three computation passes. A block diagram of the	Original	CS2420 CS2420 8192-point 2048-point 4096x32 8/16-point 8192-point verilog code for twiddle factor radix 2 butterfly FFT CODING BY VERILOG FOR 8 POINT WITH RADIX 2 VHDL code for radix-2 fft vhdl code for FFT 32 point vhdl code for 16 point radix 2 FFT verilog code radix 4 multiplication sdc 603 vhdl code for FFT 4096 point FFT CODING BY VERILOG FOR 4 POINT WITH RADIX 2 vhdl code for radix-4 fft	PDF
verilog code for 128 bit AES encryption Abstract: vhdl code for AES algorithm CS5200 vhdl code for aes decryption CS5210-40 CS5250-80 CS5250TK CS6650 CS5260TK verilog code for image encryption and decryption Text: CS5250-80 TM High Performance AES Decryption Cores Virtual Components for the Converging World The CS5250-80 series of decryption cores1 are designed to achieve data privacy and authenticity in digital broadband, wireless, and multimedia systems. These high performance application specific silicon cores support	Original	CS5250-80 CS5250-80 CS5210-40 CS5200 DS5210/40 verilog code for 128 bit AES encryption vhdl code for AES algorithm vhdl code for aes decryption CS5250TK CS6650 CS5260TK verilog code for image encryption and decryption	PDF
CS6300 Abstract: 180NM column-major DCT Series mega pro remote TSMC 180nm CS630 2614 encoder Park transformation CS6310TK Text: CS6310 TM High Performance DCT Virtual Components for the Converging World At the heart of many video compression systems is the discrete cosine transform DCT function. The JPEGcompliant CS6310 DCT provides a high-performance transformation of a video waveform to its constituent	Original	CS6310 CS6310 DS6310 CS6300 180NM column-major DCT Series mega pro remote TSMC 180nm CS630 2614 encoder Park transformation CS6310TK	PDF
16psk block diagram Abstract: Implementation of convolutional encoder differential encoder for psk viterbi convolution 16PSK Convolutional CS3310 convolution encoder uPI Semiconductor CS3310TK Text: CS3310 TM Programmable Convolution Encoder Virtual Components for the Converging World The CS3310 Programmable Convolutional Encoder is a high performance implementation suitable for a range of Forward Error Correction applications. This highly integrated Application Specific Virtual Components ASVC	Original	CS3310 CS3310 silicon256 DS3310-a 16psk block diagram Implementation of convolutional encoder differential encoder for psk viterbi convolution 16PSK Convolutional convolution encoder uPI Semiconductor CS3310TK	PDF
viterbi convolution Abstract: 16-PSK 16psk Convolutional Encoder Convolutional DS3310 CS3310 CS3310AA CS3310TK 16psk block diagram Text: CS3310 TM Programmable Convolution Encoder Virtual Components for the Converging World The CS3310 Programmable Convolutional Encoder is a high performance implementation suitable for a range of Forward Error Correction applications. This highly integrated Application Specific Virtual Components ASVC	Original	CS3310 CS3310 DS3310 viterbi convolution 16-PSK 16psk Convolutional Encoder Convolutional CS3310AA CS3310TK 16psk block diagram	PDF
CS6710 Abstract: sum of absolute differences motion compensator mec 4.000 MHz CS6701 4001 Cross Reference Position Estimation AMBA AHB bus "Single-Port RAM" Text: CS6710 TM Motion Estimation Controller Accelerator Virtual Components for the Converging World The CS6710 is the key motion estimation and motion compensation block of both the MPEG-4 encoder and codec functions. The motion compensation functionality is incorporated to complete the encoder's reconstruction path.	Original	CS6710 CS6710 DS6710 sum of absolute differences motion compensator mec 4.000 MHz CS6701 4001 Cross Reference Position Estimation AMBA AHB bus "Single-Port RAM"	PDF
Amphion Abstract: vhdl code for 4 channel dma controller dct verilog code CS6650 ESVA vhdl code for transpose memory Text: CS6650 TM High Definition MPEG-2 Video Decoder Virtual Components for the Converging World The CS6650 high-definition MPEG2 decoder is designed to provide high performance solutions for a broad range of motion image applications. This highly integrated application specific core is developed for standard	Original	CS6650 CS6650 DS6650-c Amphion vhdl code for 4 channel dma controller dct verilog code ESVA vhdl code for transpose memory	PDF

verilog code for 2-d discrete wavelet transform Abstract: wavelet transform verilog vhdl code for discrete wavelet transform jpeg encoder vhdl code source code verilog for park transformation dwt verilog code verilog source code for park transformation xilinx dwt image compression verilog code for dwt transform verilog code for amba ahb bus Text: CS6510 TM JPEG2000 Encoder Virtual Components for the Converging World The CS6510 JPEG2000 Encoder is a high performance application specific solution enabling leading edge image compression and transmission applications. The core is fully compliant with the ISO/IEC 15444-1 JPEG2000	Original	CS6510 JPEG2000 CS6510 JPEG2000 720x480) DS6510 verilog code for 2-d discrete wavelet transform wavelet transform verilog vhdl code for discrete wavelet transform jpeg encoder vhdl code source code verilog for park transformation dwt verilog code verilog source code for park transformation xilinx dwt image compression verilog code for dwt transform verilog code for amba ahb bus	PDF