TRUTH TABLE NOT GATE 74 Search Results

NXP AVC8T245

Contextual Info: NXP demo board for configurable logic device 74AXP1G57 Demonstrate seven different logic functions This compact board makes it easy to evaluate all seven functions of the 74AXP1G57 Key features and benefits `` Wide supply voltage range: 0.7 to 2.75 V `` High noise immunity

JESD22-C101E

Contextual Info: Demonstrate seven different logic functions NXP demo board for the configurable logic device 74AUP1T97 NXP demo board for the configurable logic device 74AUP1T97 Key features and benefits } Wide supply voltage range: 2.3 to 3.6 V } High noise immunity } Excellent ESD protection

TTL 74ls86

Abstract: 4 inputs OR gate truth table 74ls86 74LS86 truth table 74ls86 datasheet SN54/74LS86 schottky 74LS86 5 inputs OR gate truth table 74LS86 ttl truth table NOT gate 74
Contextual Info: SN54/74LS86 QUAD 2-INPUT EXCLUSIVE OR GATE QUAD 2-INPUT EXCLUSIVE OR GATE LOW POWER SCHOTTKY VCC 14 13 12 11 10 9 8 J SUFFIX CERAMIC CASE 632-08 14 1 2 3 4 5 6 1 7 GND N SUFFIX PLASTIC CASE 646-06 14 1 TRUTH TABLE IN OUT A B Z L L H H L H L H L H H L 14 1

74LS86

Abstract: TTL 74ls86 truth table NOT gate 74 74LS86 ttl truth table and gate 74 74LS86 truth table truth table OR gate 74 751A-02 4 inputs OR gate truth table 5 inputs OR gate truth table
Contextual Info: SN54/74LS86 QUAD 2-INPUT EXCLUSIVE OR GATE QUAD 2-INPUT EXCLUSIVE OR GATE LOW POWER SCHOTTKY VCC 14 13 12 11 10 9 8 J SUFFIX CERAMIC CASE 632-08 14 1 2 3 4 5 6 1 7 GND N SUFFIX PLASTIC CASE 646-06 14 1 TRUTH TABLE IN OUT A B Z L L H H L H L H L H H L 14 1

Contextual Info: 74LCX00 Low-voltage CMOS quad dual input NAND gate with 5 V tolerant inputs Datasheet − production data Features • 5 V tolerant inputs ■ High speed – tPD = 4.3 ns max. at VCC = 3 V ■ Power-down protection on inputs and outputs ■ Symmetrical output impedance

Contextual Info: 74LCX32 Low voltage CMOS 2-input OR gate with 5V tolerant inputs Features • 5V tolerant inputs ■ High speed: – tPD = 5.2ns Max at VCC = 3V ■ Power down protection on inputs and outputs ■ Symmetrical output impedance: – |IOH| = IOL = 24mA (Min) at VCC = 3V

74LCX32

Abstract: 74LCX32MTR 74LCX32TTR JESD97 TSSOP14
Contextual Info: 74LCX32 Low voltage CMOS 2-input OR gate with 5V tolerant inputs Features • 5V tolerant inputs ■ High speed: – tPD = 5.2ns Max at VCC = 3V ■ Power down protection on inputs and outputs ■ Symmetrical output impedance: – |IOH| = IOL = 24mA (Min) at VCC = 3V

74LS156

Abstract: LS155 LS156 SN54LSXXXJ SN74LSXXXD SN74LSXXXN truth table for 1 to 4 decoder 74LS155
Contextual Info: M M O T O R O L A SN54/74LS155 SN54/74LS156 DUAL 1-0F-4 DECODER/ DEMULTIPLEXER The SN54/74LS155 and SN54/74LS156 are high speed Dual 1-of-4 Decoder/Demultiplexers. These devices have two decoders with common 2-bit Address inputs and separate gated Enable inputs. Decoder “a” has an

74LCX00

Abstract: 74LCX00MTR 74LCX00TTR JESD97 TSSOP14
Contextual Info: 74LCX00 Low voltage CMOS QUAD 2-Input NAND gate with 5V tolerant inputs Features • 5V tolerant inputs ■ High speed: – tPD = 4.3ns Max at VCC = 3V ■ Power down protection on inputs and outputs ■ Symmetrical output impedance: – |IOH| = IOL = 24mA (Min) at VCC = 3V

74LCX86

Abstract: 74LCX86MTR 74LCX86TTR JESD97 TSSOP14
Contextual Info: 74LCX86 Low voltage CMOS quad Exclusive OR gate with 5V tolerant inputs Features • 5V tolerant inputs ■ High speed: – tPD = 6.5ns Max at VCC = 3V ■ Power down protection on inputs and outputs ■ Symmetrical output impedance: – |IOH| = IOL = 24mA (Min) at VCC = 3V

74LS155

Abstract: truth table for 4 to 16 decoder 74ls156 LS155 truth table for 1 to 16 decoder 74LS155 DATASHEET DOWNLOAD LS156 SN54LSXXXJ 2 to 4 decoder for ttl circuit 4 to 16 decoder for ttl circuit
Contextual Info: SN54/74LS155 SN54/74LS156 DUAL 1-OF-4 DECODER/ DEMULTIPLEXER The SN54 / 74LS155 and SN54 / 74LS156 are high speed Dual 1-of-4 Decoder/Demultiplexers. These devices have two decoders with common 2-bit Address inputs and separate gated Enable inputs. Decoder “a” has an

LS155

Abstract: 74ls155 74 ls 155 demultiplexer 74ls156
Contextual Info: MOTOROLA SN54/74LS155 SN54/74LS156 DUAL 1-0F-4 DECODER/ DEMULTIPLEXER The SN 54/74LS 155 and S N 54/74LS 156 are high speed Dual 1-of-4 Decoder/Demultiplexers. These devices have two decoders with common 2-bit Address inputs and separate gated Enable inputs. Decoder “a” has an

74LCX08

Abstract: 74LCX08MTR 74LCX08TTR JESD97 TSSOP14
Contextual Info: 74LCX08 Low voltage CMOS QUAD 2-input AND gate with 5V tolerant inputs Features • 5V tolerant inputs ■ High speed: – tPD = 4.1ns Max at VCC = 3V ■ Power down protection on inputs and outputs ■ Symmetrical output impedance: – |IOH| = IOL = 24mA (Min) at VCC = 3V

Contextual Info: 74LCX08 Low voltage CMOS QUAD 2-input AND gate with 5V tolerant inputs Features • 5V tolerant inputs ■ High speed: – tPD = 4.1ns Max at VCC = 3V ■ Power down protection on inputs and outputs ■ Symmetrical output impedance: – |IOH| = IOL = 24mA (Min) at VCC = 3V

Contextual Info: 74LCX00 Low-voltage CMOS quad dual-input NAND gate with 5 V tolerant inputs Datasheet − production data Features • 5 V tolerant inputs ■ High speed – tPD = 4.3 ns max at VCC = 3 V ■ Power-down protection on inputs and outputs ■ Symmetrical output impedance

Contextual Info: 74LCX02 Low voltage CMOS QUAD 2-Input NOR gate with 5V tolerant inputs Features • 5V tolerant inputs ■ High speed: – tPD = 4.4ns Max at VCC = 3V ■ Power down protection on inputs and outputs ■ Symmetrical output impedance: – |IOH| = IOL = 24mA (Min) at VCC = 3V

74LCX02

Abstract: 74LCX02MTR 74LCX02TTR JESD97 TSSOP14
Contextual Info: 74LCX02 Low voltage CMOS QUAD 2-Input NOR gate with 5V tolerant inputs Features • 5V tolerant inputs ■ High speed: – tPD = 4.4ns Max at VCC = 3V ■ Power down protection on inputs and outputs ■ Symmetrical output impedance: – |IOH| = IOL = 24mA (Min) at VCC = 3V

Contextual Info: 74LCX86 Low voltage CMOS quad Exclusive OR gate with 5V tolerant inputs Features • 5V tolerant inputs ■ High speed: – tPD = 6.5ns Max at VCC = 3V ■ Power down protection on inputs and outputs ■ Symmetrical output impedance: – |IOH| = IOL = 24mA (Min) at VCC = 3V

DECODER

Abstract: demultiplexer truth table LS TTL family characteristics 74ls156 74LS155 5 inputs OR gate truth table DATA SHEET OF 74LS155 SN54/74LS15 LS155 LS156
Contextual Info: SN54/74LS155 SN54/74LS156 DUAL 1-OF-4 DECODER/ DEMULTIPLEXER The SN54 / 74LS155 and SN54 / 74LS156 are high speed Dual 1-of-4 Decoder/Demultiplexers. These devices have two decoders with common 2-bit Address inputs and separate gated Enable inputs. Decoder “a” has an

Contextual Info: 74LCX86 Low voltage CMOS quad Exclusive OR gate with 5V tolerant inputs Features • 5V tolerant inputs ■ High speed: – tPD = 6.5ns Max at VCC = 3V ■ Power down protection on inputs and outputs ■ Symmetrical output impedance: – |IOH| = IOL = 24mA (Min) at VCC = 3V

Contextual Info: 74LCX02 Low voltage CMOS QUAD 2-Input NOR gate with 5V tolerant inputs Features • 5V tolerant inputs ■ High speed: – tPD = 4.4ns Max at VCC = 3V ■ Power down protection on inputs and outputs ■ Symmetrical output impedance: – |IOH| = IOL = 24mA (Min) at VCC = 3V

74LS02

Abstract: TTL 74ls02 74LS02 truth table 74LS02 TTL truth table NOT gate 74 74LS02 datasheet 751A-02
Contextual Info: SN54/74LS02 QUAD 2-INPUT NOR GATE QUAD 2-INPUT NOR GATE VCC 14 1 LOW POWER SCHOTTKY 13 2 12 11 3 4 10 5 9 6 8 J SUFFIX CERAMIC CASE 632-08 7 14 GND 1 N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION SN54LSXXJ SN74LSXXN

74LS30

Abstract: TTL 74ls30 751A-02 truth table nand gate
Contextual Info: SN54/74LS30 8-INPUT NAND GATE 8-INPUT NAND GATE VCC 14 1 LOW POWER SCHOTTKY 13 2 12 11 3 4 10 5 9 6 8 J SUFFIX CERAMIC CASE 632-08 7 14 GND 1 N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION SN54LSXXJ SN74LSXXN SN74LSXXD

SN54LSXXXJ

Contextual Info: <8> MOTOROLA SN54/74LS260 DUAL 5-INPUT NOR GATE DUAL 5-INPUT NOR GATE vcc LOW POWER SCHOTTKY J SUFFIX CERAMIC CASE 632-08 GND 1 N SUFFIX FrP csss, 1 D SUFFIX SOIC CASE 751A-02 5 ORDERING INFORMATION SN54LSXXXJ SN74LSXXXN SN74LSXXXD Ceramic Plastic SOIC GUARANTEED OPERATING RANGES