KK74HCT27A
Abstract: KK74HCT27AD KK74HCT27AN
Text: TECHNICAL DATA KK74HCT27A Triple 3-Input NOR Gate The KK74HCT27A is high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL LSTTL . The device provide the Triple 3-input NOR function. • Outputs Directly Interface to CMOS, NMOS, and TTL
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KK74HCT27A
KK74HCT27A
KK74HCT27AN
KK74HCT27AD
012AB)
KK74HCT27AD
KK74HCT27AN
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74HCT27
Abstract: IZ74HCT27A 0751
Text: TECHNICAL DATA IN74HCT27A Triple 3-Input NOR Gate The IN74HCT27A is high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL LSTTL . The device provide the Triple 3-input NOR function. • Outputs Directly Interface to CMOS, NMOS, and TTL
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IN74HCT27A
IN74HCT27A
IN74HCT27AN
IN74HCT27AD
IZ74HCT27A
74HCT27
74HCT27
IZ74HCT27A
0751
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74HC27
Abstract: IN74HC27A IN74HC27AD IN74HC27AN
Text: TECHNICAL DATA IN74HC27A Triple 3-Input NOR Gate The IN74HC27A is high-speed Si-gate CMOS device and are pin compatible with low power Schottky TTL LSTTL . The device provide Triple 3-input NOR function. • Outputs Directly Interface to CMOS, NMOS, and TTL
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IN74HC27A
IN74HC27A
IN74HC27AN
IN74HC27AD
IZ74HC27A
74HC27
74HC27
IN74HC27AD
IN74HC27AN
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KK74HC27A
Abstract: KK74HC27AD KK74HC27AN
Text: TECHNICAL DATA KK74HC27A Triple 3-Input NOR Gate The KK74HC27A is high-speed Si-gate CMOS device and are pin compatible with low power Schottky TTL LSTTL . The device provide Triple 3-input NOR function. • Outputs Directly Interface to CMOS, NMOS, and TTL
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Original
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KK74HC27A
KK74HC27A
KK74HC27AN
KK74HC27AD
012AB)
KK74HC27AD
KK74HC27AN
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74HC27
Abstract: IN74HC27A IN74HC27AD IN74HC27AN
Text: TECHNICAL DATA IN74HC27A Triple 3-Input NOR Gate The IN74HC27A is high-speed Si-gate CMOS device and are pin compatible with low power Schottky TTL LSTTL . The device provide Triple 3-input NOR function. • Outputs Directly Interface to CMOS, NMOS, and TTL
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Original
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IN74HC27A
IN74HC27A
IN74HC27AN
IN74HC27AD
IZ74HC27A
74HC27
74HC27
IN74HC27AD
IN74HC27AN
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74HCT27
Abstract: IZ74HCT27A
Text: TECHNICAL DATA IN74HCT27A Triple 3-Input NOR Gate The IN74HCT27A is high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL LSTTL . The device provide the Triple 3-input NOR function. • Outputs Directly Interface to CMOS, NMOS, and TTL
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Original
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IN74HCT27A
IN74HCT27A
IN74HCT27AN
IN74HCT27AD
IZ74HCT27A
74HCT27
74HCT27
IZ74HCT27A
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F100K
Abstract: J24E W24B
Text: 100301 Low Power Triple 5-Input OR/NOR Gate General Description The 100301 is a monolithic triple 5-input OR/NOR gate. All inputs have 50 kΩ pull-down resistors and all outputs are buffered. n n n n 2000V ESD protection Pin/function compatible with 100101
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DS100302-1
DS100302
Diagrams959
F100K
J24E
W24B
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Untitled
Abstract: No abstract text available
Text: 100301 Low Power Triple 5-Input OR/NOR Gate General Description The 100301 is a monolithic triple 5-input OR/NOR gate. All inputs have 50 kΩ pull-down resistors and all outputs are buffered. n n n n 2000V ESD protection Pin/function compatible with 100101
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DS100302-1
DS100302
24-Pin
9152801MXA
100301J
915280VXA
00301W
5962Full
9152801MYA
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Untitled
Abstract: No abstract text available
Text: 100301 Low Power Triple 5-Input OR/NOR Gate General Description The 100301 is a monolithic triple 5-input OR/NOR gate. All inputs have 50 kΩ pull-down resistors and all outputs are buffered. n n n n 2000V ESD protection Pin/function compatible with 100101
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DS100302-1
DS100302
24-Pin
5962-9152801MYA
5962-9152801VXA
100301J-QMLV
5962-915280VXA
100301WQMLV
5962-9152801VYA
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F100K
Abstract: No abstract text available
Text: 100301 Low Power Triple 5-Input OR/NOR Gate General Description The 100301 is a monolithic triple 5-input OR/NOR gate. All inputs have 50 kΩ pull-down resistors and all outputs are buffered. n n n n n 2000V ESD protection Pin/function compatible with 100101
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MIL-STD-883
DS010579-1
24-Pin
DS010579-2
DS010579
F100K
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DM74ALS11A
Abstract: 74ALS DM74ALS DM74ALS11AM DM74ALS11AN M14A N14A
Text: DM74ALS11A Triple 3-Input AND Gate General Description This device contains three independent gates, each of which performs the logic AND function. Features n Advanced oxide-isolated, ion-implanted Schottky TTL process n Functionally and pin for pin compatible with Schottky
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DM74ALS11A
DS006181-1
DM74ALS11AM
DM74ALS11AN
DM74ALS11A
74ALS
DM74ALS
DM74ALS11AN
M14A
N14A
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DM74ALS27
Abstract: 74ALS DM74ALS DM74ALS27M DM74ALS27N M14A N14A
Text: DM74ALS27 Triple 3-Input NOR Gate n Advanced oxide-isolated, ion-implanted Schottky TTL process n Functionally and pin for pin compatible with Schottky and low power Schottky TTL counterpart n Improved AC performance over Schottky and low power Schottky counterparts
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DM74ALS27
DS006187-1
DM74ALS27M
DM74ALS27N
DM74ALS27
74ALS
DM74ALS
DM74ALS27N
M14A
N14A
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ScansU9X23
Abstract: No abstract text available
Text: F100101 Triple 5-Input OR/NOR Gate F100K ECL Product Description The F100101 is a monolithic triple 5-input OR/NOR gate. All inputs have 50 k i l pull-down resistors and all outputs are buffered. Connection Diagrams 24-Pin DIP Top View Pin Names Dna, Dnb, Dnc
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F100101
F100K
24-Pin
ScansU9X23
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Untitled
Abstract: No abstract text available
Text: £ÿj SCS-THOMSON T74LS15 TRIPLE 3-INPUT AND GATE DESCRIPTION The T74LS15 is a high speed TRIPLE 3-INPUT AND GATE with open collector output fabricated in LOW POWER SCHOTTKY technology. SCHEMATIC PIN CONNECTION (top view) DUAL IN LINE Open Collector Outputs
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T74LS15
T74LS15
Typ20
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Untitled
Abstract: No abstract text available
Text: 11 54F/74F11 Triple 3-Input AND Gate Connection Diagrams Ordering Code: See Section 5 Pin Assignment for DIP and SOIC Pin Assignment for LCC and PCC Input Loading/Fan-Out: See Section 3 for U.L. definitions 54F/74F U.L. HIGH/LOW Description Pin Names Inputs
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54F/74F11
54F/74F
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Untitled
Abstract: No abstract text available
Text: Semiconductor 100301 Low Power Triple 5-Input OR/NOR Gate General Description 2000V ESD protection The 100301 is a m onolithic triple 5-input O R /N O R gate. All inputs have 50 kQ pull-dow n resistors and all outputs are buffered. Pin/function com patible w ith 100101
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DS100302
Connecti00-272-9959
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Untitled
Abstract: No abstract text available
Text: 10 54F/74F10 Triple 3-Input NAND Gate Connection Diagrams Ordering Code: See Section 5 Pin Assignment for LCC and PCC Pin Assignment for DIP and SOIC Input Loading/Fan-Out: See Section 3 for U.L. definitions 54F/74F U.L. HIGH/LOW Description Pin Names Inputs
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54F/74F10
54F/74F
54F/74F
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F100K
Abstract: J24E W24B
Text: Semiconductor 100301 Low Power Triple 5-Input OR/NOR Gate 2000V ESD protection General Description The 100301 is a m onolithic triple 5-input O R /N O R gate. All inputs have 50 k£l pull-dow n resistors and all outputs are buffered. Pin/function com patible w ith 100101
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DS100302
DS100302-5
24-Lead
F100K
J24E
W24B
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PDF
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Untitled
Abstract: No abstract text available
Text: AC11 54AC/74AC11 Triple 3-Input AND Gate Connection Diagrams 1Outputs Source/Sink 24 mA Ordering Code: See Section 6 Pin Assignment for LCC Pin Assignment or DIP, Flatpak and SOIC DC Characteristics (unless otherwise specified Symbol Parameter 54AC 74AC
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54AC/74AC11
54/74AC
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PDF
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Untitled
Abstract: No abstract text available
Text: AC11 54AC/74AC11 Triple 3-Input AND Gate Connection Diagrams • Outputs Source/Sink 24 mA Ordering Code: See Section 6 Pin Assignment for DIP, Flatpak and SOIC Pin Assignment for LCC 5 DC Characteristics unless otherwise specified Parameter Symbol Icc Maximum Quiescent
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54AC/74AC11
54/74AC
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PDF
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Untitled
Abstract: No abstract text available
Text: R C H II_ D E M IC O N D U C T Q R r 100301 Low Power Triple 5-Input OR/NOR Gate General Description The 100301 is a monolithic triple 5-input OR/NOR gate. All inputs have 50 k£l pull-down resistors and all outputs are buffered. 2000V ESD protection Pin/function compatible with 100101
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MIL-STD-883
24-Pin
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PDF
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Untitled
Abstract: No abstract text available
Text: Phifips Semiconductors Product specification Triple 3-input NAND gate 74LV10 FEATURES DESCRIPTION • Optimized for Low Voltage applications: 1.0 to 3.6 V The 74L.V10 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT10.
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74LV10
74HC/HCT10.
74LV10
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74ALS
Abstract: DM74ALS DM74ALS27 DM74ALS27M DM74ALS27N M14A N14A
Text: CM <9 National Semiconductor DM74ALS27 Triple 3-Input NOR Gate Advanced oxide-isolated, ion-implanted Schottky TTL process Functionally and pin for pin compatible with Schottky and low power Schottky TTL counterpart Improved AC performance over Schottky and low pow
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DM74ALS27
DM74ALS27M
DM74ALS27N
DM74ALS27
500fi
bSD1122
74ALS
DM74ALS
M14A
N14A
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Untitled
Abstract: No abstract text available
Text: NATIONAL SEMICOND -CLOGIO □SQ'llSS QQbT13H 1 31E D DM54ALS10A/DM74ALS10A Triple 3-input NAND Gate • Advanced oxide-isolated, ion-implanted Schottky TTL process ■ Functionally and pin for pin compatible with Schottky and low power Schottky TTL counterpart
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QQbT13H
DM54ALS10A/DM74ALS10A
TUF/6180-1
DM54ALS10AJ,
DM74ALS10AM,
DM74ALSt
DM54ALS10A
DM74ALS10A
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