Untitled
Abstract: No abstract text available
Text: TYPES SN54H103, SN74H103 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR R E V I S E D D E C E M B E R 1983 SN 5 4 H 1 0 3 . . . J OR W P A C K A G E S N 7 4 H 103 . . . J OR N P A C K A G E P a c k a g e O p tio n s Include Plastic and C eram ic D IP s
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SN54H103,
SN74H103
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Untitled
Abstract: No abstract text available
Text: 54AC11109, 74AC11109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET TI0066— D2957, M ARCH 1987— REVISED M ARCH 1990 Flow-Through Architecture to Optimize PCB Layout 54AC11109 . . . J PACKAGE 74AC11109 . . . D OR N PACKAGE TOP VIEW
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54AC11109,
74AC11109
TI0066--
D2957,
500-mA
STD-883C
300-mil
54AC11109
74AC11109
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PDF
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SN74HC74
Abstract: No abstract text available
Text: SN54HC74, SN74HC74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET _ SCLS094A - DECEMBER 1982 - REVISED JANUARY 1996 Package Options Include Plastic Small-Outline D , Shrink Small-Outline (DB), Thin Shrink Small-Outline (PW), and
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SN54HC74,
SN74HC74
SCLS094A
300-mil
SN54HC74.
SN74HC74
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M 5110
Abstract: m5110 UM5110
Text: UD/15110 10 Sec Voice Synthesizer with Serial/Random Trigger Features • a ■ ■ Operating Voltage Range: 2.4V - 5.2V Power supply mode selectable by PWD 10 second voice duration 12 voice sections with serial or random trigger functions ■ The STA/STB can option for stop pulse, busy, or LED
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UD/15110
24-pin
DescriptionTRG10
TRG11
TRG12
UM5110
UM5110H
M 5110
m5110
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TC4538
Abstract: No abstract text available
Text: C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC4538BP/BF TC4538BP/TC4538BF DUAL PRECISION TRIGGERABLE/RESETTABLE MONOSTABLE MULTIVIBRATOR The TC4538BP/BF is the triggerable/resettable monostable multivibrator and the trigger operation can be made at either the leading or trailing edge by
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TC4538BP/BF
TC4538BP/TC4538BF
TC4538BP/BF
TC4528B,
100ka,
TC4538
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PDF
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74AS374
Abstract: IC CLK 374 74ALS374A
Text: SN74ALS374A, SN74AS374, SN54ALS374A, SN54AS374 OCTAL D-TYPE EDGE-TRIGGERED FUP-FLOPS WITH 3-STATE OUTPUTS D 2 6 6 1 , A P H IL 1982 - R E V IS E D M A Y 1986 D-Type Flip-Flops In a Single Package S N 5 4 A L S 3 7 4 A , S N 5 4 A S 3 7 4 . . . J PAC KAG E
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SN74ALS374A,
SN74AS374,
SN54ALS374A,
SN54AS374
300-mil
SN74AS374
SN64AS374
ALS374
74AS374
IC CLK 374
74ALS374A
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Untitled
Abstract: No abstract text available
Text: SN54HCT534, SN74HCT534 OCTAL D TYPE EDGE TRIGGERED FLIP FLOPS WITH 3-STATE OUTPUTS D 2 8 0 4 , M A R CH 1 9 8 4 - R E V IS E D S EP T EM B ER 1 987 • Inputs are TTL-Voltage Compatible • High-Current 3-State Inverting Outputs Can Drive Up to 15 LSTTL Loads
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SN54HCT534,
SN74HCT534
300-Mil
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jl 54123
Abstract: SN64121
Text: TYPES SN54221, SN54LS221, SN74221, SN74LS221 DUAL MONOSTABLE MULTIVIBRATORS WITH SCHMITT-TRIGGER INPUTS R E V IS E D D E C E M B E R 1 9 8 3 SN54221, SN54LS221 . . . J OR W PACKAGE SN74221 . . J OR N PACKAGE SN74LS221 . . D, J OR N PACKAGE TOP VIEW 1A C 1 ^ J l 6
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SN54221,
SN54LS221,
SN74221,
SN74LS221
SM54LS221,
SN74221
SN54121,
SN74121
jl 54123
SN64121
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SN74F564
Abstract: No abstract text available
Text: SN54F564, SN74F564 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS D 30 34, SEP T EM B ER 1 9 8 7 -R E V IS E D J A N U A R Y 1989 SN 54 F S6 4 . . . J PACKAGE S N 74F564 . . . DW OR N PACKAGE • 3-State Bus-Driving Inverting Outputs • Buffered Control Inputs
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SN54F564,
SN74F564
300-m
74F564
54F564
74F564
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Untitled
Abstract: No abstract text available
Text: SN54HC132, SN74HC132 QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS034B - DECEMBER 1982 - REVISED JANUARY 1996 • • • • • Operation From Very Slow Input Transitions Temperature-Compensated Threshold Levels High Noise Immunity Same Pinouts as ’HCOO
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SN54HC132,
SN74HC132
SCLS034B
300-mll
SN54HC132
SN74HC132
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PDF
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d2439
Abstract: p725
Text: MC3423 OVERVOLTAGE-SENSING CIRCUIT D2439, A P R IL 1978— RE V IS E D M A R C H 1988 * D OR P PACKAGE Separate Outputs for Crowbar and Logic Circuitry TOP VIEW Programmable Time Delay to Eliminate Noise Triggering TTL-Level Activation Isolated From Voltage-Sensing Inputs
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MC3423
D2439,
d2439
p725
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PDF
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74HC113
Abstract: D Flip Flops
Text: SN 54H C 113. SN 74H C 113 DUAL J K NEGATIVE-EDGE-TRIGGERED FLIP FLOPS WITH PRESET D 2 6 8 4 , DECEMBER 1 9 8 2 -R E V IS E D SEPTEMBER 1 9 8 7 T O P V IEW L J 14 1C LK Ü Dependable Texas Instruments Quality and Reliability 1 K L 1J C ip r e h description
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300-mil
74HC113
D Flip Flops
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PIEZO BUZZER DRIVER
Abstract: only love can tr66
Text: U M 5 10 8 8 Sec Voice Synthesizer with Serial/Random Trigger Features • ■ a ■ ■ ■ ■ ■ ■ Operating Voltage Range: 2.4V - 5.2V Power supply mode selectable by PWD 8 second voice duration 12 voice sections with serial or random trigger functions
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24-pin
UM5108TRG12
UM5108H
UM5108
24LDIP
24LDIP
PIEZO BUZZER DRIVER
only love can
tr66
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74as74
Abstract: No abstract text available
Text: SN74ALS74A, SN74AS74, SN54ALS74A, SN54AS74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET D 2M 1, APRIL 1982 - REVISED SEPTEM BER 1987 Package Options Includa Plaatlc "Sm a ll OutHna" Package!, Ceramlc Chip Carrlara. and Standard Plattlc and Caramic 300-mll
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SN74ALS74A,
SN74AS74,
SN54ALS74A,
SN54AS74
300-mll
8NS4ALS74A.
SN74ALS74A.
8N64AS74A
74AS74A
74as74
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PDF
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SN54LV14
Abstract: 2020CN
Text: SN54LV14, SN74LV14 HEX SCHMITT-TRIGGER INVERTERS _ S C L S 1 8 7 B - FEBRUARY 1 9 9 3 - REVISED APRIL 1996 EPIC Enhanced-Performance Implanted CMOS 2-|i Process SN54LV14 . . . J OR W PACKAGE SN74LV14. . . D, DB, OR PW PACKAGE (TOP VIEW) TVplcal V q l p (Output Ground Bounce)
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SN54LV14,
SN74LV14
MIL-STD-883C,
JESD-17
300-mll
SN54LV14
2020CN
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al85
Abstract: No abstract text available
Text: SN74ALS564B. SN54ALS564A OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS D2681, APRIL 1982 - REVISED JAN UARY 19S9 3-State Buffer-Type Outputs Drive BusLines Directly SN 54A LS564A . J PA CKA G E SN 74A LS564B . DW OR N PA CKA G E T O P V IE W
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SN74ALS564B.
SN54ALS564A
D2681,
300-mil
LS564A
LS564B
SN74ALS564B,
SN54AL8564A
8N74ALS564B
al85
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PDF
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Untitled
Abstract: No abstract text available
Text: SN74LVC74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET JANUARY 1993 D, DB, OR PW PACKAGE TOP VIEW • EPIC (Enhanced-Performance Implanted 1CCR [ 1 1D [ 2 CMOS) Submicron Process • 1CLK [ 3 Designed to Facilitate Incident Wave
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SN74LVC74
65-mm
MIL-STD-883C,
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SN74ALS74
Abstract: LS74 74AS74 54ALS74 SN74AS74
Text: TYPES SN54ALS74, SN54AS74, SN74ALS74, SN74AS74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP FLOPS WITH CLEAR AND PRESET D2661, APRIL 1 98 2-R EV ISED DECEMBER 1983 Package Options Include Both Plastic and Ceram ic Chip Carriers in Addition to Plastic and Ceram ic DIPs
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SN54ALS74,
SN54AS74,
SN74ALS74,
SN74AS74
D2661,
54ALS74,
54AS74
ALS74
54ALS
54AS74
SN74ALS74
LS74
74AS74
54ALS74
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PDF
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CT674
Abstract: 54HCT574
Text: SN54HCT574, SN74HCT574 OCTAL D TYPE EDGE TRIGGERED FLIP FLOPS WITH 3 STATE OUTPUTS D 2804. M A R C H • Inputs are TTL-Voltage Compatible • High-Current 3-State Noninverting Outputs Drive Bus-Lines Directly or Up to 15 LSTTL Loads Bus-Structured Pinout
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SN54HCT574,
SN74HCT574
300-mil
CT674
54HCT574
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PDF
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ls74a
Abstract: 74as74
Text: SN 54ALS74A, SN 54AS74, SN 74ALS74A, SN 74 A S 74 DUAL D TYPE POSITIVE EDGE TRIGGERED FLIP FLOPS WITH CLEAR AND PRESET D 2 6 6 1 , APRIL 1 9 8 2 - • SN 54A LS74A , S N 54A S 74 . . . J PACKAGE SN 74A LS74A , S N 74A S 74 . , . D OR N PACKAGE Package O ption s Include P lastic "S m a ll O u tlin e "
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54ALS74A,
54AS74,
74ALS74A,
ALS74A
LS74A
ls74a
74as74
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PDF
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S6370
Abstract: No abstract text available
Text: S6370 THYRISTOR SILICON DIFFUSED JUNCTION Unit in mm LOW POWER SWITCHING APPLICATIONS STROBO TRIGGER 0 5 . 1 MAX. • Repetitive Peak Off-State Voltage VDRM=400V • Repetitive Peak Reverse Voltage Vr r m =4° o v • Fast Turn On Time tgt= l .5 jjs I 1
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S6370
S6370
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PDF
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54HC112
Abstract: No abstract text available
Text: SN54HC112, SN74HC112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET 02684, DECEMBER 1982-REVISED SEPTEMBER 1987 SN54HC112 . . . J PACKAGE SN74HC112 . . . D OR N PACKAGE TOP VIEW ] 1CLK C 1 O l 6 H V CC i k C 2 15 3 1CLR 14 H 2CLR u [ 3
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SN54HC112,
SN74HC112
1982-REVISED
300-mil
SN54HC112
SN74HC112
SN54HC112
54HC112
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PDF
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Untitled
Abstract: No abstract text available
Text: C2 MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC • W = _= - . = ■ T C 4 S 5 8 4 F S C H M IT T T R IG G E R Unit In mm + 0.2 23 - 0.3 + 0.2 lß-0.1 TC4S584F contains one circuit inverter having the Schmitt trigger function at the input term inal.
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TC4S584F
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PDF
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Untitled
Abstract: No abstract text available
Text: 74ACT11132 QUADRUPLE POSITIVE-NAND GATE WITH SCHMITT-TRIGGER INPUTS SCAS177 - D3974, JANUARY 1992 - REVISED APRIL 1993 Inputs Are TTL-Voltage Compatible Center-Pin V^c and GND Pin Configurations Minimize High-Speed Switching Noise EP/C Enhanced-Performance Implanted
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74ACT11132
SCAS177
D3974,
500-mA
300-mll
foCAS177
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PDF
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