Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    TRD16 Search Results

    SF Impression Pixel

    TRD16 Price and Stock

    Koyo Encoder Inc TRD-1625

    NRB Thrust Washer, 25.4mm ID, 39.67mm OD | Koyo TRD-1625
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    RS TRD-1625 Bulk 12 3 Weeks 1
    • 1 $3.33
    • 10 $3.33
    • 100 $3.33
    • 1000 $3.33
    • 10000 $3.33
    Buy Now

    TRD16 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    ACTEL CCGA 1152 mechanical

    Abstract: AX125 AX2000 CQ208 CQ256 CS180 FG256 PQ208 Trd16 Axcelerator Family FPGAs
    Text: v2.8 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates


    Original
    PDF

    dunlop s 708

    Abstract: PTI 30 040 ga AX125 AX2000 CS180 FG256 FG324 FG484 PQ208 M33 thermal fuse
    Text: Advanced v1.5  Axcelerator Family FPGAs Le adi n g- E dg e P e rfo r ma nc e • • • • – Voltage-Referenced I/O Standards: GTL+, HSTL Class 1, SSTL2 Class 1 and 2, SSTL3 Class 1 and 2 – Registered I/Os with 64-bit Deep FIFO on Each Pin "PerPin FIFO"


    Original
    PDF 64-bit 608-bit dunlop s 708 PTI 30 040 ga AX125 AX2000 CS180 FG256 FG324 FG484 PQ208 M33 thermal fuse

    ACTEL CCGA 1152 mechanical

    Abstract: lga 4x4 footprint AX125 AX2000 CQ208 CS180 FG256 PQ208 624-Pin tx 434
    Text: v2.7 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates


    Original
    PDF

    DP U1

    Abstract: IO317 AX1000
    Text: Advanced v1.5  Axcelerator Family FPGAs Leading-Edge Performance • • • • – Voltage-Referenced I/O Standards: GTL+, HSTL Class 1, SSTL2 Class 1 and 2, SSTL3 Class 1 and 2 – Registered I/Os with 64-bit Deep FIFO on Each Pin "PerPin FIFO" – Hot-Swap Compliant I/Os (Except PCI)


    Original
    PDF 700Mb/s 339kbits DP U1 IO317 AX1000

    GCLR

    Abstract: 676P Axcelerator Family FPGAs
    Text: v2.4 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates


    Original
    PDF

    AF4 din 74

    Abstract: AF2.5 din 74 diode t25 4 g8 Axcelerator Family FPGAs
    Text: v2.5 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates


    Original
    PDF

    AX1000

    Abstract: n14132 SYNAPTICAD WAVEFORMER ax125c k7g4 diode AA16
    Text: Advanced v1.1 Axcelerator Family FPGAs Le adi n g- E dg e P e rfo r ma nc e • • • • 350+ MHz System Performance 500+ MHZ Internal Performance High-Performance Embedded FIFOs 622Mb/s LVDS Capable I/Os S pe ci fi c at i on s • • • • • Up to 2 Million Equivalent System Gates


    Original
    PDF 622Mb/s 339kbits AX1000 n14132 SYNAPTICAD WAVEFORMER ax125c k7g4 diode AA16

    Axcelerator FPGAs

    Abstract: AX125 AX2000 CQ208 CS180 PQ208 M33 thermal fuse AK 1022 Axcelerator Family FPGAs
    Text: v2 .1  Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates


    Original
    PDF 700Mb/s 295kbits Axcelerator FPGAs AX125 AX2000 CQ208 CS180 PQ208 M33 thermal fuse AK 1022 Axcelerator Family FPGAs

    ACTEL CCGA 1152 mechanical

    Abstract: ACTEL CCGA 624 mechanical L33 thermal fuse ACTEL CCGA 1152 pin configuration actel PLL schematic footprint cqfp 240 m20 thermal fuse 115 M33 thermal fuse AX125 AX2000
    Text: v2.6 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates


    Original
    PDF

    b h21

    Abstract: No abstract text available
    Text: Revision 18 Axcelerator Family FPGAs Leading-Edge Performance • • • • 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates


    Original
    PDF 608-bit b h21

    AX1000

    Abstract: No abstract text available
    Text: Advanced v1.3  Axcelerator Family FPGAs Leading-Edge Performance • • • • – Voltage-Referenced I/O Standards: GTL+, HSTL Class 1, SSTL2 Class 1 and 2, SSTL3 Class 1 and 2 – Registered I/Os with 64-bit Deep FIFO on Each Pin "PerPin FIFO" – Hot-Swap Compliant I/Os (Except PCI)


    Original
    PDF 64-bit 608-bit 14tains AX1000

    AX125

    Abstract: AX2000 CQ208 CQ256 FG256 FG324 PQ208 AX2000-CQ256
    Text: Revision 17 Axcelerator Family FPGAs Leading-Edge Performance • • • • 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates


    Original
    PDF

    AF367

    Abstract: AK 1022 IC KA 2312 P2272 AX1000
    Text: Advanced v1.6  Axcelerator Family FPGAs Le adi n g- E dg e P e rfo r ma nc e • • • • 350+ MHz System Performance 500+ MHZ Internal Performance High-Performance Embedded FIFOs 700Mb/s LVDS Capable I/Os S pe ci fi c at i on s • • • • • Up to 2 Million Equivalent System Gates


    Original
    PDF 700Mb/s 295kbits AF367 AK 1022 IC KA 2312 P2272 AX1000

    IO191

    Abstract: Axcelerator Family FPGAs
    Text: v2.3 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates


    Original
    PDF

    v1493a

    Abstract: AK 1022
    Text: Advanced v1.4  Axcelerator Family FPGAs Leading-Edge Performance • • • • – Voltage-Referenced I/O Standards: GTL+, HSTL Class 1, SSTL2 Class 1 and 2, SSTL3 Class 1 and 2 – Registered I/Os with 64-bit Deep FIFO on Each Pin "PerPin FIFO" – Hot-Swap Compliant I/Os (Except PCI)


    Original
    PDF 700Mb/s 339kbits v1493a AK 1022

    FBGA 896

    Abstract: AX125 AX2000 CS180 IDTQS32X2384 Silicon Sculptor II Axcelerator Family FPGAs
    Text: Axcelerator Family FPGAs Detailed Specifications Operating Conditions Table 2-1 lists the absolute maximum ratings of Axcelerator devices. Stresses beyond the ratings may cause permanent damage to the device. Exposure to Absolute Maximum rated conditions for extended periods may affect device


    Original
    PDF 18-channel FBGA 896 AX125 AX2000 CS180 IDTQS32X2384 Silicon Sculptor II Axcelerator Family FPGAs

    Y51A

    Abstract: 5022 amplifier 33ax
    Text: A x c e l e r a to r F a m i l y F P G A s Detailed Specifications Supply Voltages VCCA VCCI Input Tolerance Output Drive Level 1.5V 1.5V 3.3V 1.5V 1.5V 1.8V 3.3V 1.8V 1.5V 2.5V 3.3V 2.5V 1.5V 3.3V 3.3V 3.3V I/ O F ea t u re s C o m p ar i s on I/O Assignment


    Original
    PDF JESD8-11) Y51A 5022 amplifier 33ax

    g5134

    Abstract: No abstract text available
    Text: v2.0  Axcelerator Family FPGAs Le adi n g- E dg e P e rfo r ma nc e • • • • 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700Mb/s LVDS Capable I/Os S pe ci fi c at i on s • • • • • Up to 2 Million Equivalent System Gates


    Original
    PDF 700Mb/s 295kbits g5134

    896-Pin

    Abstract: smartpower IO290 Axcelerator Family FPGAs
    Text: v2.2 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates


    Original
    PDF

    MA 6013

    Abstract: No abstract text available
    Text: v2.5 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates


    Original
    PDF

    AX125

    Abstract: AX2000 CS180 IDTQS32X2384 Silicon Sculptor II Axcelerator FPGAs Axcelerator Family FPGAs
    Text: Axcelerator Family FPGAs Detailed Specifications Operating Conditions Table 2-1 lists the absolute maximum ratings of Axcelerator devices. Stresses beyond the ratings may cause permanent damage to the device. Exposure to Absolute Maximum rated conditions for extended periods may affect device


    Original
    PDF 18-channel AX125 AX2000 CS180 IDTQS32X2384 Silicon Sculptor II Axcelerator FPGAs Axcelerator Family FPGAs

    CQFP 256 PIN actel

    Abstract: No abstract text available
    Text: Axcelerator Family FPGAs Detailed Specifications Operating Conditions Table 2-1 lists the absolute maximum ratings of Axcelerator devices. Stresses beyond the ratings may cause permanent damage to the device. Exposure to Absolute Maximum rated conditions for extended periods may affect device


    Original
    PDF 18-channel CQFP 256 PIN actel